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10AS032E2F29E1HG

閰嶅柈灏堝浼佹キ(y猫)鍚嶅柈

鍨嬭櫉
渚涙噳鍟�
鏁�(sh霉)閲�
寤犲晢
灏佽
鎵硅櫉
鍍规牸
瑾槑
鎿嶄綔

1/1闋� 40姊�/闋� 鍏�40姊�
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鎮ㄦ槸涓嶆槸瑕佹壘锛� 10AS032E2F29E1SG 10AS032E2F29E2LG 10AS032E2F29E2SG 10AS032E2F29I1HG 10AS032E2F29I1SG 10AS032E2F29I2LG 10AS032E2F29I2SG 10AS032E3F27E2LG 10AS032E3F27E2SG

10AS032E2F29E1HG PDF涓嬭級 鍦栨枃鍙婅硣鏂欏儏渚涘弮鑰冿紝浠ュ闅汸DF鐐烘簴

10AS032E2F29E1HG PDF涓嬭級

鍔熻兘鎻忚堪
IC SOC FPGA 360 I/O 780FBGA
鍒堕€犲晢
altera
绯诲垪
Arria 10 SX
鍖呰
鎵樼洡
闆朵欢鐙€鎱�(t脿i)
鍦ㄥ敭
鏋舵(g貌u)
MCU锛孎(xi脿n)PGA
鏍稿績铏曠悊鍣�
闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight?
MCU 闁冨瓨
-
MCU RAM
256KB
澶栬ō(sh猫)
DMA锛孭OR锛學DT
閫ｆ帴鎬�
EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
閫熷害
1.5GHz
涓昏灞€�
FPGA - 320K 閭忚集妯″
宸ヤ綔婧害
0掳C ~ 100掳C锛圱J锛�
灏佽/澶栨
780-BBGA锛孎(xi脿n)CBGA
渚涙噳鍟嗗櫒浠跺皝瑁�
780-FBGA锛�29x29锛�
I/O 鏁�(sh霉)
360
妯欐簴鍖呰
1

10AS032E2F29E1HG 鎶€琛�(sh霉)鍙冩暩(sh霉)

10AS032E2F27I2SG 鍔熻兘鎻忚堪:672-PIN FBGA 鍒堕€犲晢:altera 绯诲垪:Arria 10 SX 闆朵欢鐙€鎱�(t脿i):鍦ㄥ敭鏋舵(g貌u):MCU锛孎(xi脿n)PGA 鏍稿績铏曠悊鍣�:闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight? MCU 闁冨瓨:- MCU RAM:256KB 澶栬ō(sh猫):DMA锛孭OR锛學DT 閫ｆ帴鎬�:EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG 閫熷害:1.5GHz 涓昏灞€�:FPGA - 320K 閭忚集妯″ 宸ヤ綔婧害:-40掳C ~ 100掳C锛圱J锛� I/O 鏁�(sh霉):240 妯欐簴鍖呰:1 10AS032E2F27I2LG 鍔熻兘鎻忚堪:672-PIN FBGA 鍒堕€犲晢:altera 绯诲垪:Arria 10 SX 闆朵欢鐙€鎱�(t脿i):鍦ㄥ敭鏋舵(g貌u):MCU锛孎(xi脿n)PGA 鏍稿績铏曠悊鍣�:闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight? MCU 闁冨瓨:- MCU RAM:256KB 澶栬ō(sh猫):DMA锛孭OR锛學DT 閫ｆ帴鎬�:EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG 閫熷害:1.5GHz 涓昏灞€�:FPGA - 320K 閭忚集妯″ 宸ヤ綔婧害:-40掳C ~ 100掳C锛圱J锛� I/O 鏁�(sh霉):240 妯欐簴鍖呰:1 10AS032E2F27I1SG 鍔熻兘鎻忚堪:IC SOC FPGA 240 I/O 672FBGA 鍒堕€犲晢:altera 绯诲垪:Arria 10 SX 鍖呰:鎵樼洡闆朵欢鐙€鎱�(t脿i):Digi-Key 鍋滄渚涙噳鏋舵(g貌u):MCU锛孎(xi脿n)PGA 鏍稿績铏曠悊鍣�:闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight? MCU 闁冨瓨:- MCU RAM:256KB 澶栬ō(sh猫):DMA锛孭OR锛學DT 閫ｆ帴鎬�:EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG 閫熷害:1.5GHz 涓昏灞€�:FPGA - 320K 閭忚集妯″ 宸ヤ綔婧害:-40掳C ~ 100掳C锛圱J锛� 灏佽/澶栨:672-BBGA锛孎(xi脿n)CBGA 渚涙噳鍟嗗櫒浠跺皝瑁�:672-FBGA锛�27x27锛� I/O 鏁�(sh霉):240 妯欐簴鍖呰:1 10AS032E2F27I1HG 鍔熻兘鎻忚堪:IC SOC FPGA 240 I/O 672FBGA 鍒堕€犲晢:altera 绯诲垪:Arria 10 SX 鍖呰:鎵樼洡闆朵欢鐙€鎱�(t脿i):鍦ㄥ敭鏋舵(g貌u):MCU锛孎(xi脿n)PGA 鏍稿績铏曠悊鍣�:闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight? MCU 闁冨瓨:- MCU RAM:256KB 澶栬ō(sh猫):DMA锛孭OR锛學DT 閫ｆ帴鎬�:EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG 閫熷害:1.5GHz 涓昏灞€�:FPGA - 320K 閭忚集妯″ 宸ヤ綔婧害:-40掳C ~ 100掳C锛圱J锛� 灏佽/澶栨:672-BBGA锛孎(xi脿n)CBGA 渚涙噳鍟嗗櫒浠跺皝瑁�:672-FBGA锛�27x27锛� I/O 鏁�(sh霉):240 妯欐簴鍖呰:1 10AS032E2F27E2SG 鍔熻兘鎻忚堪:672-PIN FBGA 鍒堕€犲晢:altera 绯诲垪:Arria 10 SX 闆朵欢鐙€鎱�(t脿i):鍦ㄥ敭鏋舵(g貌u):MCU锛孎(xi脿n)PGA 鏍稿績铏曠悊鍣�:闆� ARM? Cortex?-A9 MPCore?锛屽付 CoreSight? MCU 闁冨瓨:- MCU RAM:256KB 澶栬ō(sh猫):DMA锛孭OR锛學DT 閫ｆ帴鎬�:EBI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG 閫熷害:1.5GHz 涓昏灞€�:FPGA - 320K 閭忚集妯″ 宸ヤ綔婧害:0掳C ~ 100掳C锛圱J锛� I/O 鏁�(sh霉):240 妯欐簴鍖呰:1 10AS032E3F27I2LG 10AS032E3F27I2SG 10AS032E3F29E2LG 10AS032E3F29E2SG 10AS032E3F29I2LG 10AS032E3F29I2SG 10AS032E4F27E3LG 10AS032E4F27E3SG 10AS032E4F27I3LG 10AS032E4F27I3SG 10AS032E4F29E3LG 10AS032E4F29E3SG 10AS032E4F29I3LG 10AS032E4F29I3SG 10AS032H1F34E1HG 10AS032H1F34E1SG 10AS032H1F34I1HG 10AS032H1F34I1SG