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參數資料
| 型號： | DDU7F-100 |
| 英文描述： | Tapped Delay Line |
| 中文描述： | 抽頭延遲線 |
| 文件頁數： | 2/4頁 |
| 文件大?。?/td> | 74K |
| 代理商： | DDU7F-100 |
DDU7F
Doc #97016
DATA DELAY DEVICES, INC.
2
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APPLICATION NOTES
HIGH FREQUENCY RESPONSE
The DDU7F tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
Delay Devices if your application requires device
testing at a specific input condition.
POWER SUPPLY BYPASSING
The DDU7F relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to the VCC pin, is
recommended. A wide VCC trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
V
CC
V
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-55
MAX
7.0
V
CC
+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
SYMBOL
V
OH
MIN
2.5
TYP
3.4
MAX
UNITS
V
NOTES
V
CC
= MIN, I
OH
= MAX
V
IH
= MIN, V
IL
= MAX
V
CC
= MIN, I
OL
= MAX
V
IH
= MIN, V
IL
= MAX
Low Level Output Voltage
V
OL
0.35
0.5
V
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
I
OH
I
OL
V
IH
V
IL
V
IK
I
IHH
-1.0
20.0
mA
mA
V
V
V
mA
2.0
0.8
-1.2
0.1
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
I
IH
I
IL
I
OS
20
-0.6
-150
25
12.5
μ
A
mA
mA
Unit
Load
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
-60
相關PDF資料 |
PDF描述 |
|---|---|
| DDU7F-100A2 | Delay Line |
| DDU7F-100B2 | Delay Line |
| DDU7F-100M | Delay Line |
| DDU7F-100MC3 | Delay Line |
| DDU7F100ME5 | Logic IC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DDU7F-100A2 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7F) |
| DDU7F-100B2 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7F) |
| DDU7F-100M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7F) |
| DDU7F-100MC3 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7F) |
| DDU7F100ME5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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