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參數資料
| 型號： | DS28EA00U+T&R |
| 廠商： | Maxim Integrated |
| 文件頁數： | 11/29頁 |
| 文件大小： | 328K |
| 描述： | IC THERMOMETER 1-WIRE 8-USOP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 3,000 |
| 功能： | 溫度計，恒溫計 |
| 傳感器類型： | 內部 |
| 感應溫度： | -40°C ~ 85°C |
| 精確度： | ±0.5°C（最小值） |
| 拓撲： | 寄存器庫，變簽式暫存器 |
| 輸出類型： | 數字 |
| 輸出警報： | 是 |
| 輸出風扇： | 無 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-uMAX |
| 包裝： | 帶卷 (TR) |
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PIO Access Read [F5h]
This command reads the PIO logical status and reports
it together with the state of the PIO output latch in an
endless loop. A PIO Access Read can be terminated at
any time with a 1-Wire reset. PIO Access Read can be
executed in the Chain ON and Chain DONE state.
While the device is in the Chain ON or Chain DONE
state, the PIO output latch states always read out as 1s;
the PIO pin state may not be reported correctly.
The state of both PIO channels is sampled at the same
time. The first sampling occurs during the last (most
significant) bit of the command code F5h. The PIO sta-
tus is then reported to the bus master. While the master
receives the last (most significant) bit of the PIO status
byte, the next sampling occurs and so on until the mas-
ter generates a 1-Wire reset. The sampling occurs with
a delay of t
REH
+ x from the rising edge of the MS bit of
the previous byte, as shown in Figure 6. The value of
x is approximately 0.2祍.
PIO Access Write [A5h]
The PIO Access Write command writes to the PIO out-
put latches, which control the pulldown transistors of
the PIO channels. In an endless loop, this command
first writes new data to the PIO and then reads back the
PIO status. This implicit read-after-write can be used by
the master for status verification. A PIO Access Write
can be terminated at any time with a 1-Wire reset. The
PIO Access Write command is ignored by the device
while in Chain ON or Chain DONE state.
After the command code, the master transmits a PIO
output data byte that determines the new state of the
PIO output transistors. The first (least significant) bit is
associated to PIOA; the next bit affects PIOB. The other
6 bits of the new state byte do not have corresponding
PIO pins. These bits should always be transmitted as 1s.
To switch the output transistor on, the corresponding bit
value is 0. To switch the output transistor off (non-con-
ducting), the bit must be 1. This way the bit transmitted
1-Wire Digital Thermometer with
Sequence Detect and PIO
DS28EA00
Maxim Integrated
11
PIO Status Bit Assignment
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
COMPLEMENT OF B3 TO B0
PIOB OUTPUT
LATCH STATE
PIOB PIN
STATE
PIOA OUTPUT
LATCH STATE
PIOA PIN
STATE
PIO Output Data Bit Assignment
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
X
X
X
X
X
X
PIOB
PIOA
SAMPLING POINT**
t
REH
+ X
V
TH
IO
*THE "PREVIOUS BYTE" COULD BE THE COMMAND CODE OR THE DATA BYTE RESULTING FROM THE PREVIOUS PIO SAMPLE.
**THE SAMPLE POINT TIMING ALSO APPLIES TO THE PIO ACCESS WRITE COMMAND, WITH THE "PREVIOUS BYTE" BEING THE WRITE CONFIRMATION BYTE (AAh).
MOST SIGNIFICANT 2 BITS OF PREVIOUS BYTE*
LEAST SIGNIFICANT 2 BITS OF PIO STATUS BYTE
Figure 6. PIO Access Read Timing Diagram
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| DS28EC20+ | 功能描述:電可擦除可編程只讀存儲器 20Kb 1-Wire 電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數據保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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