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參數(shù)資料
| 型號： | MAX2365ETM+T |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 10/29頁 |
| 文件大小： | 460K |
| 描述： | IC TRANSMITTER QUAD 48TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 頻率： | 900MHz |
| 應(yīng)用： | 無線 LAN |
| 功率 - 輸出： | 9dBm |
| 電流 - 傳輸： | 90mA |
| 數(shù)據(jù)接口： | PCB，表面貼裝 |
| 天線連接器： | PCB，表面貼裝 |
| 電源電壓： | 2.7V ~ 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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Complete Dual-Band
Quadrature Transmitters
10 ______________________________________________________________________________________
Pin Description (continued)
PIN
MAX2361
MAX2363
MAX2365
NAME
FUNCTION
16, 17
16, 17
IFOUTH-,
IFOUTH+
Differential IF Outputs. These ports are active when the register bit IF_SEL is
1. They do not support FM mode. These pins must be inductively pulled up
to V
CC
. A differential IF bandpass filter is connected between this port and
IFINH+ or IFINH-. The pullup inductors can be part of the filter structure. The
differential output impedance of this port is nominally 600&. The transmission
lines from these pins should be short to minimize the pickup of spurious sig-
nals and noise.
18, 19
18, 19
IFOUTL-,
IFOUTL+
Differential IF Outputs. These ports are active when the register bit IF_SEL is
0. These pins must be inductively pulled up to V
CC
. A differential IF band-
pass filter is connected between this port and IFINL+ and IFINL-. The pullup
inductors can be part of the filter structure. The differential output impedance
of this port is nominally 600&. The transmission lines from these pins should
be short to minimize the pickup of spurious signals and noise.
20
20
20
GC
RF and IF Gain Control Analog Input. Apply 0.6V to 2.4V to control the gain of
the RF and IF stages. An RC filter on this pin should be used to reduce DAC
noise or PDM clock spurs from this line.
21
21
21
V
CC
Supply Pin for the IF VGA. Bypass with a capacitor as close to the pin as
possible. The bypass capacitor must not share its ground vias with any other
branches.
22
22
22
V
CC
Supply for the I/Q Modulator. Bypass with a capacitor as close to the pin as
possible. The bypass capacitor must not share its ground vias with any other
branches.
23, 24
23, 24
23, 24
Q+, Q-
Differential Q-Channel Baseband Inputs to the Modulator. These pins go
directly to the bases of a differential pair and require an external common-
mode bias voltage.
25, 26
25, 26
25, 26
I+, I-
Differential I-Channel Baseband Inputs to the Modulator. These pins go
directly to the bases of a differential pair and require an external common-
mode bias voltage.
27
27
27
SHDN
Shutdown Input, Drive to Logic High for Normal Operation. A logic low on
SHDN shuts down the entire IC except the serial interface and retains the
information in all registers. An R-C lowpass can be used to filter digital noise.
28
28
28
V
CC
Supply Pin to the VCO Section. Bypass as close to the pin as possible. The
bypass capacitor should not share its vias with any other branches.
29
29
29
IFLO
Buffered LO Output. Control the output buffer using register bit BUF_EN and
the divide ratio using the register bit BUF_DIV.
30, 31
30, 31
TANKL-,
TANKL+
Differential Tank Pins for the Low-Frequency IF VCO. These pins are internally
biased. VCO_SEL = 0 selects this IF VCO.
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