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參數資料
| 型號： | MC1121 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | 100mA Charge Pump Voltage Converter with Shutdown |
| 中文描述： | 100mA的電荷泵電壓轉換器，具有關斷 |
| 文件頁數： | 3/8頁 |
| 文件大?。?/td> | 102K |
| 代理商： | MC1121 |
MC1121
http://onsemi.com
3
APPLICATIONS INFORMATION
Negative Voltage Converter
The MC1121 is typically used as a charge–pump voltage
inverter. C1 and C2 are the only two external capacitors used
in the operating circuit (see Figure 1).
Figure 1. Charge Pump Inverter
GND
CAP–
FC
Vout
SHDN
4
3
1
8
5
2
6
7
CAP+
C2
OSC
VDD
SHDN*
2.4 V to 5.5 V
+
–
C2
+
–
Vout
MC1121
NOTES: *SHDN should be tied to VDD if not used.
The MC1121 is not actively regulated. A typical output
source resistance of 11.8 means that an input of +5V
results in - 5V output voltage under light load, and only
decreases to - 3.8V (typ) with a 100mA load.
The supplied output current is from capacitor C2 during
one–half the charge–pump cycle. This results in a
peak–to–peak ripple of:
VRIPPLE = IOUT/2(fPUMP) (C2) + IOUT (ESRC2)
Where f
PUMP
is 5kHz (one half the nominal 10kHz
oscillator frequency), and C2 = 150
μ
F with an ESR of 0.2
ripple is about 90mV with a 100mA load current. If C2 is
raised to 390
μ
F, the ripple drops to 45mV.
Changing Oscillator Frequency
The MC1121’s clock frequency is controlled by four
modes:
FC
OSC
Oscillator Frequency
Open
Open
10kHz
FC = VDD
Open or
FC = VDD
Open
Open
200kHz
External
Capacitor
Reduced from 10kHz or
200kHz depending on FC state
External Clock
External Clock Frequency
The oscillator runs at 10kHz (typical) when FC and OSC
are not connected. The oscillator frequency is lowered by
connecting a capacitor between OSC and GND, but FC can
still multiply the frequency by 20 times in this mode.
An external clock source that swings within 100mV of
VDD and GND may overdrive OSC in the inverter mode.
OSC can be driven by any CMOS logic output. When OSC
is overdriven, FC has no effect.
Note that the frequency of the signal appearing at CAP
+
and CAP
-
is half that of the oscillator. In addition, by
lowering the oscillator frequency, the effective output
resistance of the charge–pump increases. To compensate for
this, the value of the charge–pump capacitors may be
increased.
Because the 5kHz output ripple frequency may be low
enough to interfere with other circuitry, the oscillator
frequency can be increased with the use of the FC pin or an
external oscillator. The output ripple frequency is half the
selected oscillator frequency. Although the MC1121’s
quiescent current will increase if the clock frequency is
increased, it allows smaller capacitance values to be used for
C1 and C2.
Capacitor Selection
In addition to load current, the following factors affect the
MC1121 output voltage drop from its ideal value 1) output
resistance, 2) pump (C1) and reservoir (C2) capacitor ESRs,
and 3) C1 and C2 capacitance.
The voltage drop is the load current times the output
resistance. The loss in C2 is the load current times C2’s ESR;
C1’s loss is larger because it handles currents greater than
the load current during charge–pump operation. Therefore,
the voltage drop due to C1 is about four times C1’s ESR
multiplied by the load current, and a low (or high) ESR
capacitor has a greater impact on performance for C1 than
for C2.
In general, as the MC1121’s pump frequency increases,
capacitance values needed to maintain comparable ripple
and output resistance diminish proportionately.
Cascading Devices
To produce greater negative magnitudes of the initial
supply voltage, the MC1121 may be cascaded (see Figure 2).
The resulting output resistance is approximately equal to the
sum of individual MC1121 R
OUT
values. The output voltage
(where n is an integer representing the number of devices
cascaded) is defined by
V
OUT
= - n (V
IN
).
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