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參數資料
| 型號： | MC14082BDR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | B-SUFFIX SERIES CMOS GATES |
| 中文描述： | 4000/14000/40000 SERIES, DUAL 4-INPUT AND GATE, PDSO14 |
| 封裝： | LEAD FREE, SOIC-14 |
| 文件頁數： | 10/11頁 |
| 文件大?。?/td> | 327K |
| 代理商： | MC14082BDR2G |
MOTOROLA CMOS LOGIC DATA
MC14001B
16
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
DIM
A
B
C
D
F
G
J
K
L
M
N
MIN
0.750
0.245
0.155
0.015
0.055
0.100 BSC
0.008
0.125
0.300 BSC
0
0.020
MAX
0.785
0.280
0.200
0.020
0.065
MIN
19.05
6.23
3.94
0.39
1.40
MAX
19.94
7.11
5.08
0.50
1.65
MILLIMETERS
INCHES
2.54 BSC
0.21
3.18
7.62 BSC
0
0.51
0.015
0.170
0.38
4.31
15
0.040
15
1.01
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–A–
–B–
C
14 PL
0.25 (0.010)
D
G
F
N
K
14 PL
J
M
L
S
B
M
0.25 (0.010)
T
S
A
M
T
–T–
SEATING
PLANE
1
7
14
9
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE L
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
1
7
14
8
B
A
F
H
G
D
K
C
N
L
J
M
SEATING
PLANE
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
0.715
0.240
0.145
0.015
0.040
0.100 BSC
0.052
0.008
0.115
0.300 BSC
0
0.015
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
MILLIMETERS
INCHES
2.54 BSC
1.32
0.20
2.92
7.62 BSC
0
0.39
0.095
0.015
0.135
2.41
0.38
3.43
10
10
1.01
0.039
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