- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382300 > MC1GU512HACA-0QC00 (SAMSUNG SEMICONDUCTOR CO. LTD.) MultiMediaCard Specification PDF資料下載
參數(shù)資料
| 型號(hào)： | MC1GU512HACA-0QC00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MultiMediaCard Specification |
| 中文描述： | 多媒體卡規(guī)格 |
| 文件頁數(shù)： | 64/66頁 |
| 文件大?。?/td> | 1422K |
| 代理商： | MC1GU512HACA-0QC00 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁當(dāng)前第64頁第65頁第66頁
MultiMediaCard
TM
64
Figure 4-20 Timing diagram: Read CSD register
Single Block Write
The host may deselect a card (by raising the CS) at any time during the card busy period (refer to the
given timing diagram). The card will release the DataOut line one clock after the CS going high. To check
if the card is still busy it needs to be reselected by asserting (set to low) the CS signal. The card will
resume busy signal (pulling DataOut low) one clock cycle after the falling edge of CS.
Figure 4-20 Timing Diagram: Single Block Write
Multiple Block Write
The timimg behaviour of the multiple block write transaction starting from the comamnd up to the first
data block is identical to the single block write. Figure 63 describes the timing between the data blocks of
a multiple block write transaction. Timing of the ‘Stop Tran’ token is identical to a standard data block.
After the “Stop Tran” token is received ny the card, the data on the DataOut line is undefined for one byte
(NBR), after which a Busy token may apear. The host may deselect and reselect the card during every
busy period between the data blocks. Timing for toggling the CS signal is identical to the Single block
write transaction.
Figure 4-21 Timing Diagram: Multiple Block Write
Timing Values
Min
NCS
0
NCR
1
NCX
0
Max
8
8
8
(10/8)*(TAAC*Fo
p+100*NSAC)
8
8
8
Unit
8Clock cycles
8Clock cycles
8Clock cycles
NAC
1
8Clock cycles
NRC
NWR
NEC
1
1
0
8Clock cycles
8Clock cycles
8Clock cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC1GU128NACA | MultiMediaCard Specification |
| MC1DU128NACA | MultiMediaCard Specification |
| MC1GU256NACA | MultiMediaCard Specification |
| MC1DU256NACA | MultiMediaCard Specification |
| MC28U016HACA-0QC00 | MultiMediaCard Specification |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC1GU512HACB-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC1GU512HACC-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC1GU512HAFA-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC1GU512HAFB-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
| MC1GU512HAFC-0QC00 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:MultiMediaCard Specification |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。