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參數資料
| 型號： | MC26LS30D |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | CABLE GLAND, PG29 |
| 中文描述： | QUAD LINE DRIVER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 11/16頁 |
| 文件大小： | 108K |
| 代理商： | MC26LS30D |
MC26LS30
http://onsemi.com
11
SYSTEM EXAMPLES
(Pin numbers refer to SO–16 package only.)
Differential System
An example of a typical EIA–422–A system is shown in
Figure 17. Although EIA–422–A does not specifically
address multiple driver situations, the MC26LS30 can be
used in this manner since the outputs can be put into a high
impedance mode. It is, however, the system designer’s
responsibility to ensure the Enable pins are properly
controlled so as to prevent two drivers on the same cable from
being “on” at the same time.
The limit on the number of receivers and drivers which
may be connected on one system is determined by the input
current of each receiver, the maximum leakage current of
each “off” driver, and the DC current through each
terminating resistor. The sum of these currents must not
exceed the capability of the “on” driver (
≈
60 mA). If the
cable is of any significant length, with receivers at various
points along its length, the common mode voltage may vary
along its length, and this parameter must be considered when
calculating the maximum driver current.
The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC resistance.
The maximum resistance must be such that the minimum
voltage across any receiver inputs is never less than 200 mV.
The ground terminals of each driver and receiver in Figure
17 must be connected together by a dedicated wire (or the
shield) in the cable to provide a common reference. Chassis
grounds or power line grounds should not be relied on for
this common connection as they may generate significant
common mode differences. Additionally, they usually do
not provide a sufficiently low impedance at the frequencies
of interest.
Single–Ended System
An example of a typical EIA–423–A system is shown in
Figure 18. Multiple drivers on a single data line are not
possible since the drivers cannot be put into a high
impedance mode. Although each driver is shown connected
to a single receiver, multiple receivers can be driven from a
single driver as long as the total load current of the receivers
and the terminating resistor does not exceed the capability
of the driver (
≈
60 mA). If the cable is of any significant
length, with receivers at various points along its length, the
common mode voltage may vary along its length, and this
parameter must be considered when calculating the
maximum driver current.
The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC
resistance. The maximum resistance must be such that the
minimum voltage across any receiver inputs is never less
than 200 mV.
The ground terminals of each driver and receiver in
Figure 18 must be connected together by a dedicated wire
(or the shield) in the cable so as to provide a common
reference. Chassis grounds or power line grounds should not
be relied on for this common connection as they may
generate
significant
common
Additionally, they usually do not provide a sufficiently low
impedance at the frequencies of interest.
mode
differences.
Additional Modes of Operation
If compliance with EIA–422–A or EIA–423–A Standard
is not required in a particular application, the MC26LS30
can be operated in two other modes.
1) The device may be operated in the differential mode
(Pin 4 = 0) with V
EE
connected to any voltage between
ground and –5.25 V. Outputs in the low state will be
referenced to V
EE
, resulting in a differential output voltage
greater than that shown in Figure 6. The Enable pins will
operate the same as previously described.
2) The device may be operated in the single–ended mode
(Pin 4 = 1) with V
EE
connected to any voltage between
ground and –5.25 V. Outputs in the high state will be at a
voltage as shown in Figure 10, while outputs in a low state
will be referenced to V
EE
.
Termination Resistors
Transmission line theory states that, in order to preserve
the shape and integrity of a waveform traveling along a
cable, the cable must be terminated in an impedance equal
to its characteristic impedance. In a system such as that
depicted in Figure 17, in which data can travel in both
directions, both physical ends of the cable must be
terminated. Stubs leading to each receiver and driver should
be as short as possible.
In a system such as that depicted in Figure 18, in which
data normally travels in one direction only, a terminator is
theoretically required only at the receiving end of the cable.
However, if the cable is in a location where noise spikes of
several volts can be induced onto it, then a terminator
(preferably a series resistor) should be placed at the driver
end to prevent damage to the driver.
Leaving off the terminations will generally result in
reflections which can have amplitudes of several volts above
V
CC
or several volts below ground or V
EE
. These
overshoots/undershoots can disrupt the driver and/or
receiver, create false data, and in some cases, damage
components on the bus.
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PDF描述 |
|---|---|
| MC26LS30DR2 | Dual Differential Quad Single-Ended (EIA-423-A) Line Drivers |
| MC28B | 28 Lead Ceramic Small Outline Package, EPROM NS Package |
| MC33060ADG | Fixed Frequency, PWM, Voltage Mode Single Ended Controllers |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC26LS30DG | 功能描述:RS-422接口集成電路 Dual Diff EIA-422-A to Quad EIA-423-A RoHS:否 制造商:Texas Instruments 數據速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
| MC26LS30DG | 制造商:ON Semiconductor 功能描述:RS422/485 Line Driver IC |
| MC26LS30DR2 | 功能描述:RS-422接口集成電路 Dual Diff EIA-422-A RoHS:否 制造商:Texas Instruments 數據速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
| MC26LS30DR2G | 功能描述:RS-422接口集成電路 Dual Diff EIA-422-A to Quad EIA-423-A RoHS:否 制造商:Texas Instruments 數據速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
| MC26LS31 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Quad Line Driver with NAND Enabled Three-State Outputs |
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