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參數資料
| 型號： | MC33253 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Full Bridge Pre-Driver |
| 中文描述： | 全橋預驅動器 |
| 文件頁數： | 6/15頁 |
| 文件大小： | 615K |
| 代理商： | MC33253 |
MC33253
rev3.0 - 6/15
MC33253
DYNAMIC ELECTRICAL CHARACTERISTICS
V
CC
= 12 V, V
CC2
= 12 V, C
CP
= 33 nF, G_EN = 4.5 V unless otherwise specified.
Typical values for TA = 25
°
C, Min/Max values for TA = -40
°
C to +125
°
NOTE 2: Between 4.6V and 5.5V, the device has been a non erroneous behaviour.
NOTE 3: Input overdrive 1V
NOTE 4: Rise time is given by time needed to charge the gate from 1V to 10V (Vice versa for fall time)
NOTE : C
load
corresponds to a capacitor between GATE_HS and SRC_HS for the high side and between GATE_LS and ground for low side.
N.B.
In some applications a large dV/dt at Pin 2 (C2) due to sudden changes at V
CC
can cause a large peak currents flowing through
Pin15 (C1).
Positive transitions at Pin2 (C2) ;mimimum peak current :
I
c1
min = 2.0A
t
c1
min = 600ns (see for peak description)
Negative transitions at Pin2 (C2); maximum peak current :
I
c1
max = 2.0A
t
c1
max = 600ns (see for peak description)
Current sourced by Pin 15 (C1) during a large dV/dt will result in a negative voltage at Pin 15; negative transitions at Pin2(C2);
minimum peak voltage:
V
c1
min = -1.5V
t
c1
max = 600ns (see for peak description)
Figure 2. Limits of C1 Current&Voltage with Large ValuesdV/dt of Vcc
Characteristics
Pin #
Symbol
Min
Typ
Max
Unit
Prop. Delay HS and LS, C
load
=5nF;
Between 50% Input to 50% Output
(see Figure 2)
5, 6, 7, 8, 9,
20, 21, 22, 23
t
PD
200
300
ns
Turn On Rise Time, C
load
=5nF ;
10% to 90% (NOTE 4) (see Figure 2)
5, 10, 19, 24
t
r
80
180
ns
Turn Off Fall Time, C
load
=5nF ;
10% to 90% (NOTE 4) (see Figure 2)
t
f
80
180
ns
t
c1
max
t
C1
min
VCC
I[C1
+
C2]
I
c1
max
I
c1
min
V[LR_OUT]
0 V
V[C1]
0 A
V
c1
min
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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