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參數(shù)資料
| 型號(hào)： | MC34058FTA |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | 5-V Battery-Backup Supervisors for RAM Retention 8-MSOP -40 to 85 |
| 中文描述： | LINE TRANSCEIVER, PQFP48 |
| 封裝： | PLASTIC, TQFP-48 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大小： | 237K |
| 代理商： | MC34058FTA |
MC34058 MC34059
10
MOTOROLA ANALOG IC DEVICE DATA
Appendix A. Optimizing the Thermal Performance of the MC34058/9
Figure 12. Electrical Model of Package Heat Transfer
Device Junction
Ambient Temperature
RCA
RJCU
RJCD
RCDB
RLB
RJL
IPD
5.0 A
Board Temperature
An equivalent electrical circuit for the thermal model for the
MC34058/9 package is shown in Figure 12. It is a simplified
model that shows the dominant means of heat transfer from
the thermally enhanced 48–ld package used for the
MC34058/9. The model is a first order approximation and is
intended to emphasize the need to consider thermal issues
when designing the IC into any system. It is however
customary to use similar models and Equation 1 to estimate
device junction temperatures.
Equation 1 is the common means of using the thermal
resistance of a package to estimate junction temperature in a
particular system.
TJ
PD·
jx
TA
[1]
The term
θ
jx in Equation 1 is usually quoted as a ja value
in
°
C/Watt. However, since the 48–ld package for the
MC34058/9 has been thermally enhanced to take advantage
of other heat sinking potentials, it must be modified.
θ
jx must
actually be considered a composite of all the heat transfer
paths from the chip. That is, the three dominant and parallel
paths shown in Figure 12. Of those three paths, potentially
the most effective is the corner package leads. This is
because these corner leads have been attached to the flag
on which the silicon die is situated. These pins can be
connected to circuit board ground to provide a more efficient
conduction path for internal package heat. This path is
modeled as the Rjl (junction–to–leads) and Rlb
(leads–to–board) combination in Figure 12. This path
provides the most effective way of removing heat from the
device provided that there is a viable temperature potential
(i.e. heat sinking source) to conduct towards. However, if it is
not properly considered in the system design, the other
paths, (Rjcd + Rcdb) and (Rjcu + Rca) attain greater
importance and must be more carefully considered.
So Equation 1, modified to reflect a more complete heat
transfer model becomes;
[2]
TJ
TA ·
1
1
Rjcd
1
Rjlb
1
1
Rjcd
1
Rjlb
Rjca
TB·
Rjca
1
1
Rjcd
1
Rjlb
Rjca
PDISS ·
ja
where;
TJ= Junction Temperature
TA = Ambient Temperature
TB = Board Temperature
PDISS = Device Power
and
θ
ja = Total Thermal Resistance and is composed the
parallel combination of all the heat transfer paths from
the package.
While Equation 2 is still only a first order approximation of
the heat transfer paths of the MC34058/9, at least now it
includes consideration for the most effective heat transfer
path for the MC34058/9; the board to which the device is
soldered. The modified equation also better serves to
explain how external variables, namely the board and
ambient temperatures, affect the thermal performance of
the MC34058/9.
Methods of removing heat via the flag connected pins can
be classified into two means; conduction and convection.
Radiation is omitted as the contribution is small compared to
the other means. Conduction is by far the best method to
draw heat away from the MC34058/9 package. This is best
accomplished by using a multilayer board with generous
ground plane. In this case, the flag connected pins can be
connected directly to the ground plane to maximize the heat
transfer from the package. Figure 13 shows the results of
thermal measurements of a board with an external ground
plane (the actual ground area was approximately 6 1/4 in2).
The thermal leads are connected to the board ground plane
per the recommended strategy.
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