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參數(shù)資料
| 型號(hào)： | MC74F85N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-BIT MAGNITUDE COMPARATOR FAST SCHOTTKY TTL |
| 中文描述： | F/FAST SERIES, 4-BIT MAGNITUDE COMPARATOR, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大小： | 90K |
| 代理商： | MC74F85N |
4-38
FAST AND LS TTL DATA
MC54/74F85
The parallel expansion scheme shown in Figure 1 demon-
strates the most efficient general use of these comparators.
In the parallel expansion scheme, the expansion inputs can
be used as a fifth input bit position except on the least signifi-
cant device which must be connected as in the Serial
Scheme. The expansion inputs are used by labelling IA>B
as an “A” input, IA<B as a “B” input and setting IA=B low. The
‘F85 can be used as a 5-bit comparator only when the out-
puts are used to drive the (A0-A3) and (B0-B3) inputs of
another ‘F85 device. The parallel technique can be ex-
panded to any number of bits as shown in Table 1.
Table 1
Word
Length
Number of
Packages
Typical Speeds
74F
1–4 Bits
1
22 ns
NC
NC
NC
NC
(MSB) B23
A23
B22
A22
B21
A21
B20
A20
B19
A19
L
B3
A3
B2
A2
B1
A1
B0
A0
IA < B
IA = B
IA > B
A < B
A = B
A > B
B18
A18
B17
A17
B16
A16
B15
A15
B14
B13
A13
B12
A12
B11
A11
B10
A10
B9
B8
A8
B7
A7
B6
A6
B5
A5
B4
B3
A3
B2
A2
B1
A1
B0
A0
A14
A9
A4
L
L
L
L
H
L
B3
A3
B2
A2
B1
A1
B0
A0
IA < B
IA = B
IA > B
A < B
A = B
A > B
B3
A3
B2
A2
B1
A1
B0
A0
IA < B
IA = B
IA > B
A < B
A = B
A > B
B3
A3
B2
A2
B1
A1
B0
A0
IA < B
IA = B
IA > B
B3
A3
B2
A2
B1
A1
B0
A0
IA < B
IA = B
IA > B
A < B
A = B
A > B
A < B
A = B
A > B
B3
A3
B2
A2
B1
A1
B0
A0
A < B
A = B
A > B
A < B
A = B
A > B
OUTPUTS
(LSB)
Figure 1. Comparison of Two 24-Bit Words
5–25 Bits
25–120 Bits
2–6
34 ns
12 ns
8–31
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