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參數資料
| 型號： | MC74HC00ADT |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 0.8 to 1.8 V 26-A, 12-V Input Non-Isolated Wide-Adjust Module 13-DIP MODULE -40 to 85 |
| 中文描述： | HC/UH SERIES, QUAD 2-INPUT NAND GATE, PDSO14 |
| 封裝： | LEAD FREE, TSSOP-14 |
| 文件頁數： | 3/6頁 |
| 文件大小： | 71K |
| 代理商： | MC74HC00ADT |
MC74HC00A
http://onsemi.com
3
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
V
Guaranteed Limit
Symbol
Parameter
Condition
55 to 25
°
C
≤
85
°
C
≤
125
°
C
Unit
V
IH
Minimum HighLevel Input
Voltage
V
out
= 0.1V or V
CC
0.1V
|I
out
|
≤
20 A
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
V
IL
Maximum LowLevel Input
Voltage
V
out
= 0.1V or V
CC
0.1V
|I
out
|
≤
20 A
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
V
OH
Minimum HighLevel Output
Voltage
V
in
= V
IH
or V
IL
|I
out
|
≤
20 A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
=V
IH
or V
IL
|I
out
|
≤
2.4mA
|I
out
|
≤
4.0mA
|I
out
|
≤
5.2mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
V
OL
Maximum LowLevel Output
Voltage
V
in
= V
IH
or V
IL
|I
out
|
≤
20 A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IH
or V
IL
|I
out
|
≤
2.4mA
|I
out
|
≤
4.0mA
|I
out
|
≤
5.2mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
I
in
Maximum Input Leakage
Current
V
in
= V
CC
or GND
6.0
±
0.1
±
1.0
±
1.0
A
I
CC
Maximum Quiescent Supply
Current (per Package)
V
in
= V
CC
or GND
I
out
= 0 A
6.0
1.0
10
40
A
NOTE:Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book
(DL129/D).
AC CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
V
CC
V
Guaranteed Limit
Symbol
Parameter
55 to 25
°
C
≤
85
°
C
≤
125
°
C
Unit
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
C
in
Maximum Input Capacitance
10
10
10
pF
NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor HighSpeed CMOS Data Book (DL129/D).
Typical @ 25
°
C, V
CC
= 5.0 V, V
EE
= 0 V
C
PD
Power Dissipation Capacitance (Per Buffer)*
* Used to determine the noload dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
22
pF
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