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參數資料
| 型號： | MC74HC253N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-Input Data Selector/Multiplexer with 3-State Outputs |
| 中文描述： | HC/UH SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 1/5頁 |
| 文件大小： | 186K |
| 代理商： | MC74HC253N |
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
"!
High–Performance Silicon–Gate CMOS
The MC74HC253 is identical in pinout to the LS253. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
The Address inputs select one of four Data inputs from each multiplexer.
Each multiplexer has an active–low Output Enable control and a three–state
noninverting output.
The HC253 is similar in function to the HC153 which does not have
three–state outputs.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No 7A
Chip Complexity 108 FETs or 27 Equivalent Gates
LOGIC DIAGRAM
1
6
5
4
3
14
A0
7
9
Ya
Yb
D0a
D1a
D2a
D3a
ADDRESS
INPUTS
DATA–
WORD a
INPUTS
PIN 16 = VCC
PIN 8 = GND
A1
2
10
11
12
13
15
OUTPUT
ENABLE b
D0b
D1b
D2b
D3b
DATA–
WORD b
INPUTS
OUTPUT
ENABLE a
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
Output
Enable
H
L
L
L
L
A1
X
L
L
H
H
A0
X
L
H
L
H
Y
Z
D0
D1
D2
D3
D0, D1, D2, and D3 = the level of
the respective Data Inputs.
Z = high impedance
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
D2b
D3b
A0
OUTPUT
ENABLE b
VCC
Yb
D0b
D1b
D2a
D1a
D3a
A1
OUTPUT
ENABLE a
GND
Ya
D0a
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
1
16
ORDERING INFORMATION
MC74HCXXXN
MC74HCXXXD
Plastic
SOIC
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