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參數資料
| 型號： | MC74HC597AN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
| 中文描述： | HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 2/11頁 |
| 文件大?。?/td> | 291K |
| 代理商： | MC74HC597AN |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
450
Tstg
TL
Storage Temperature
TSSOP Package
– 65 to + 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
—
Ceramic DIP: – 10 mW/ C from 100 to 125 C
—
SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
(Ceramic DIP)
300
0
500
VCC = 4.5 V
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
Guaranteed Limit
– 55 to
25 C
125 C
VIH
Minimum High–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
4.5
1.5
3.15
85 C
1.5
3.15
1.5
3.15
Unit
VIL
Maximum Low–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
4.5
0.5
1.35
0.5
1.35
0.5
1.35
V
6.0
5.9
5.9
5.9
V
Vin = VIH or VIL
2.4 mA
2.48
2.34
2.20
|Iout|
3.0
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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