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參數(shù)資料
| 型號： | MC74HC7266AD |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | SMPS Controller |
| 中文描述： | HC/UH SERIES, QUAD 2-INPUT XNOR GATE, PDSO14 |
| 封裝： | PLASTIC, SOIC-14 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 137K |
| 代理商： | MC74HC7266AD |
MC74HC7266A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
3–4
LOGIC DETAIL
(1/4 of Device)
A
B
Y
APPLICATION INFORMATION
Bi
φ
–L is defined as biphase–level code. Also known as
Manchester Code, this technique utilizes binary phase shift
keying (PSK). The Bi
φ
–L output shown in Figure 3 carries
both data and synchronization information; therefore, sepa-
rate data and clock lines are not required to transfer informa-
tion. A positive–going transition in the middle of the bit
interval indicates a logic zero; a negative–going transition in-
dicates a logic one (see Figure 4).
NRZ–L shown in Figure 3 is non–return–to–zero level
code. This is simply serial data out of a shift register, such as
the HC597.
The Bi
φ
–L signal must be phase coherent (i.e., no
glitches). Therefore, NRZ–L and clock transitions must be
coincident.
Figure 3. Biphase–Level Encoder (Manchester Encoder)
NRZ–L
BI
φ
–L
CLOCK
1/4
HC7266A
POSITIVE
LOGIC DATA
1
0
1
1
0
0
BIT
INTERVAL
NRZ–L
CLOCK
BI
φ
–L
Figure 4. Timing Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74HC7266AF | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC7266AFEL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC7266AFR1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC7266N | 制造商:Motorola Inc 功能描述: |
| MC74HC73ADG | 功能描述:觸發(fā)器 DUAL J-K FLIPFLOP W RESET RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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