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參數(shù)資料
| 型號(hào)： | MC88LV915 |
| 廠商： | Motorola, Inc. |
| 英文描述： | LOW SKEW CMOS PLL CLOCK DRIVER |
| 中文描述： | 低偏移的CMOS PLL時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大小： | 127K |
| 代理商： | MC88LV915 |
MC88LV915T
TIMING SOLUTIONS
BR1333 — Rev 6
5
MOTOROLA
FREQUENCY SPECIFICATIONS
(TA = 0
°
C to 70
°
C; VCC = 3.3V
±
0.3V)
Symbol
Parameter
Guaranteed Minimum
Unit
Fmax (2X_Q)
Maximum Operating Frequency, 2X_Q Output
100
MHz
Fmax (‘Q’)
Maximum Operating Frequency,
Q0–Q3 Outputs
50
MHz
NOTE: Maximum Operating Frequency is guaranteed with the 88LV926 in a phase–locked condition.
AC CHARACTERISTICS
(TA =0
°
C to +70
°
C, VCC = 3.3V
±
0.3V, Load = 50
Terminated to VCC/2)
Symbol
Parameter
Min
Max
Unit
Condition
tRISE/FALL
Outputs
Rise/Fall Time, All Outputs
(Between 0.8 to 2.0V)
0.5
2.0
ns
Into a 50
Load
Terminated to VCC/2
tPULSE WIDTH
(Q0–Q4, Q5, Q/2)
Output Pulse Width: Q0, Q1, Q2, Q3,
Q4, Q5, Q/2 @ VCC/2
0.5tCYCLE – 0.5
1
0.5tCYCLE + 0.5
1
ns
Into a 50
Load
Terminated to VCC/2
tPULSE WIDTH
(2X_Q Output)
Output Pulse Width:
2X_Q @ 1.5V
40MHz
66MHz
80MHz
100MHz
0.5tCYCLE – 1.5
0.5tCYCLE – 1.0
0.5tCYCLE – 1.0
0.5tCYCLE – 1.0
0.5tCYCLE + 0.5
0.5tCYCLE + 0.5
0.5tCYCLE + 0.5
0.5tCYCLE + 0.5
ns
Into a 50
Load
Terminated to VCC/2
tCYCLE
(2x_Q Output)
Cycle–to–Cycle Variation
2x_Q @ VCC/2
40MHz
66MHz
80MHz
100MHz
tCYCLE – 600ps
tCYCLE – 300ps
tCYCLE – 300ps
tCYCLE – 400ps
tCYCLE + 600ps
tCYCLE + 300ps
tCYCLE + 300ps
tCYCLE + 400ps
tPD
2
SYNC Feedback
(With 1M
from RC1 to An VCC)
ns
SYNC Input to Feedback Delay 66MHz
(Measured at SYNC0 or 1 and
FEEDBACK Input Pins)
80MHz
100MHz
–1.65
–1.45
–1.25
–1.05
–0.85
–0.65
tSKEWr
3
(Rising) See Note
4
Output–to–Output Skew Between Out-
puts Q0–Q4, Q/2 (Rising Edges Only)
—
500
ps
All Outputs Into a
Matched 50
Load
Terminated to VCC/2
tSKEWf
3
(Falling)
Output–to–Output Skew Between Out-
puts Q0–Q4 (Falling Edges Only)
—
750
ps
All Outputs Into a
Matched 50
Load
Terminated to VCC/2
tSKEWall
3
Output–to–Output Skew 2X_Q, Q/2,
Q0–Q4 Rising, Q5 Falling
—
750
ps
All Outputs Into a
Matched 50
Load
Terminated to VCC/2
tLOCK
4
Time Required to Acquire Phase–Lock
From Time SYNC Input Signal is
Received
1.0
10
ms
Also Time to LOCK
Indicator High
tPZL
5
Output Enable Time OE/RST to 2X_Q,
Q0–Q4, Q5, and Q/2
3.0
14
ns
Measured With the
PLL_EN Pin Low
tPHZ,tPLZ
5
Output Disable Time OE/RST to 2X_Q,
Q0–Q4, Q5, and Q/2
3.0
14
ns
Measured With the
PLL_EN Pin Low
1. TCYCLE in this spec is 1/Frequency at which the particular output is running.
2. The TPD specification’s min/max values may shift closer to zero if a larger pullup resistor is used.
3. Under equally loaded conditions and at a fixed temperature and voltage.
4. With VCC fully powered–on, and an output properly connected to the FEEDBACK pin. tLOCK maximum is with C1 = 0.1
μ
F, tLOCK minimum is
with C1 = 0.01
μ
F.
5. The tPZL, tPHZ, tPLZ minimum and maximum specifications are estimates, the final guaranteed values will be available when ‘MC’ status is
reached.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC88LV915T | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:LOW SKEW CMOS PLL CLOCK DRIVER |
| MC88LV915T_01 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Low Voltage Low Skew CMOS PLL Clock Driver, 3-State |
| MC88LV915TEI | 功能描述:IC PLL CLOCK DRIVER 28-PLCC RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類(lèi)型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MC88LV915TEIR2 | 功能描述:IC PLL CLOCK DRIVER 3ST 28-PLCC RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:時(shí)鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類(lèi)型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱(chēng):844S012AKI-01LFT |
| MC88LV915TFN | 功能描述:IC DRV CLK PLL LV 100MHZ 28-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類(lèi)型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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