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參數資料
| 型號： | MCF5206 |
| 廠商： | Motorola, Inc. |
| 英文描述： | ColdFire Integrated Microprocessor(ColdFire微處理器) |
| 中文描述： | 集成的ColdFire微處理器（的ColdFire微處理器） |
| 文件頁數： | 3/8頁 |
| 文件大小： | 36K |
| 代理商： | MCF5206 |
MOTOROLA
MCF5206 PRODUCT INFORMATION
3
OVERVIEW
Figure 1 is a block diagram of the MCF5206 processor. The paragraphs that follow provide an overview of the
integrated processor.
Figure 1. MCF5206 Block Diagram
ColdFire Processor Core
The ColdFire processor core consists of two independent, decoupled pipeline structures to maximize
performance while minimizing core size.The instruction fetch pipeline (IFP) is a two-stage pipeline for
prefetching instructions. The prefetched instruction stream is then gated into the two-stage operand execution
pipeline (OEP), which decodes the instruction, fetches the required operands and then executes the required
function. Because the IFP and OEP pipelines are decoupled by an instruction buffer that serves as a FIFO
queue, the IFP can prefetch instructions in advance of their actual use by the OEP, thereby minimizing time
stalled waiting for instructions. The OEP is implemented in a two-stage pipeline featuring a traditional RISC
datapath with a dual-read-ported register file feeding an arithmetic/logic unit.
Instruction Cache
The instruction cache improves system performance by providing cached instructions to the execution unit in
a single clock. The MCF5206 processor uses a 512-byte, direct-mapped instruction cache to achieve 17 MIPS
at 33 Mhz.The cache is accessed by physical addresses, where each 16-byte line consists of an address tag
and a valid bit.
The instruction cache also includes a bursting interface for 32-, 16-, and 8-bit port sizes to quickly fill cache
lines.
DRAM
CHIP
SELECTS
INTERRUPT
CONTROLLER
CONTROLLER
EXTERNAL
BUS INTERFACE
DRAM
CONTROL
CHIP
SELECTS
INTERRUPT
SUPPORT
SERIAL
INTERFACE
CLOCK
INPUT
PARALLEL
INTERFACE
TIMER
SUPPORT
BDM
INTERFACE
PARALLEL
PORT
DUART
TIMERS
M-BUS
MODULE
512 BYTE ICACHE
512 BYTE SRAM
COLDFIRE
CORE
JTAG
S
C
JTAG
INTERFACE
M-BUS
INTERFACE
CLOCK
EXTERNAL
BUS
相關PDF資料 |
PDF描述 |
|---|---|
| MCF5272 | MCF5272 ColdFire Integrated Microprocessor Users Manual |
| MCF5407 | ColdFire Integrated Microprocessor(ColdFire微處理器) |
| MCM101524 | 1M x 4 Bit Fast Static Random Access Memory with ECL I/O |
| MCM101524B12 | 1M x 4 Bit Fast Static Random Access Memory with ECL I/O |
| MCM101524B15 | 1M x 4 Bit Fast Static Random Access Memory with ECL I/O |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCF5206AB16A | 功能描述:微處理器 - MPU MCF5206 V2CORE 512SRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF5206AB25A | 功能描述:微處理器 - MPU MCF5206 V2CORE 512SRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF5206AB33A | 功能描述:微處理器 - MPU MCF5206 V2CORE 512SRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MCF5206CAB16A | 功能描述:IC MCU COLDFIRE 16MHZ 160-QFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MCF520x 標準包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設備:- 輸入/輸出數:32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數據轉換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285 |
| MCF5206CAB25A | 功能描述:微處理器 - MPU MCF5206 V2CORE 512SRAM RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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