- 您現在的位置：買賣IC網 > PDF目錄371085 > MCM6264CJ12R2 (MOTOROLA INC) 16-BYTE FIFOS QUAD UART -40/85''C PDF資料下載
參數資料
| 型號： | MCM6264CJ12R2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 16-BYTE FIFOS QUAD UART -40/85''C |
| 中文描述： | 8K X 8 STANDARD SRAM, 12 ns, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-28 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 177K |
| 代理商： | MCM6264CJ12R2 |
MCM6264C
1
Motorola, Inc. 1995
8K x 8 Bit Fast Static RAM
The MCM6264C is fabricated using Motorola’s high–performance silicon–gate
CMOS technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic dual–in–line and plastic small–outline J–leaded packages.
Single 5 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
Fast Access Times: 12, 15, 20, 25, and 35 ns
Equal Address and Chip Enable Access Times
Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
Low Power Operation: 110 – 150 mA Maximum AC
Fully TTL Compatible — Three State Output
ROW
DECODER
MEMORY MATRIX
256 ROWS x 32
x 9 COLUMNS
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
DQ0
E1
E2
W
G
VCC
VSS
A1
DQ7
BLOCK DIAGRAM
A0
A6 A10 A12
A11
A9
A8
A7
A5
A4
A3
A2
Order this document
by MCM6264C/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6264C
P PACKAGE
300 MIL PLASTIC
CASE 710B–01
A0 – A12
DQ0 – DQ7
W
. . . . . . . . . . . . . . . . . . . .
G
. . . . . . . . . . . . . . . . . . .
E1, E2
. . . . . . . . . . . . . . . . .
VCC
. . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . .
Address Input
. . . . . . . . . . . . .
Data Input/Data Output
. . .
Write Enable
Output Enable
Chip Enable
Power Supply (+ 5 V)
Ground
PIN NAMES
J PACKAGE
300 MIL SOJ
CASE 810B–03
5
4
3
2
1
10
9
8
7
6
11
12
13
14
20
21
22
23
24
25
26
19
27
28
18
17
16
15
A3
A6
A7
A12
NC
DQ0
A2
A5
VSS
DQ2
DQ1
A4
A1
A0
A9
A8
E2
W
VCC
DQ4
DQ5
DQ6
DQ3
E1
G
A11
DQ7
A10
REV 2
5/95
相關PDF資料 |
PDF描述 |
|---|---|
| MCM6264CJ15 | IC,DUAL UNIV ASYNCHRONOUS RCVR/XMTR,SMT |
| MCM6264CJ15R2 | IC, DIGITAL, UART, RX/TX FIFO, 128-BYTE FIFO, PLCC44, SM |
| MCM6264CJ20 | IC, UART -40/+85 DEG C 32-QFN |
| MCM6264CJ20R2 | IC,FSK DEMODULATOR/TONE DECODER |
| MCM6264CJ25 | 8K x 8 Bit Fast Static RAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCM6264CJ15 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 8 Bit Fast Static RAM |
| MCM6264CJ15R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 8 Bit Fast Static RAM |
| MCM6264CJ20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 8 Bit Fast Static RAM |
| MCM6264CJ20R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 8 Bit Fast Static RAM |
| MCM6264CJ25 | 制造商:Motorola Inc 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。