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參數資料
| 型號： | Q67060-S6302-A2 |
| 廠商： | SIEMENS AG |
| 英文描述： | High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-PDIP -55 to 125 |
| 中文描述： | 智能雙通道阻抗高側電源開關 |
| 文件頁數： | 11/14頁 |
| 文件大小： | 191K |
| 代理商： | Q67060-S6302-A2 |
BTS 611 L1
Semiconductor Group
11
Timing diagrams
Both channels are symmetric and consequently the diagrams
are valid for each channel as well as for permuted channels
Figure 1a:
V
bb
turn on:
IN2
V
OUT1
t
V
bb
ST open drain
IN1
V
OUT2
Figure 2a:
Switching a lamp:
IN
ST
OUT
L
t
V
I
Figure 2b:
Switching an inductive load
IN
ST
L
t
V
I
*)
OUT
t
d(ST)
I
L(OL)
*) if the time constant of load is too large, open-load-status may
occur
Figure 3a:
Short circuit
shut down by overtempertature, reset by cooling
IN
ST
L
t
I
other channel: normal operation
L(SCr)
I
IL(SCp)
Heating up may require several milliseconds, depending on
external conditions
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