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參數資料
| 型號： | Q67060-S7010-A2 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 通用總線功能 |
| 英文描述： | High Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs 16-SO -55 to 125 |
| 中文描述： | 智能雙通道阻抗高側電源開關 |
| 文件頁數： | 4/12頁 |
| 文件大小： | 304K |
| 代理商： | Q67060-S7010-A2 |
BTS 707
Parameter and Conditions,
each of the two channels
at T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
typ
Unit
min
max
Semiconductor Group
4
2003-Oct-01
Turn-on time
Turn-off time
R
L
=
12
,
V
bb
= 20 V
,
T
j
=-40...+150°C
Slew rate on
10 to 30%
V
OUT
,
R
L
=
12
,
V
bb
= 20 V
,
Slew rate off
70 to 40%
V
OUT
,
R
L
=
12
,
V
bb
= 20 V
,
to 90%
V
OUT
:
to 10%
V
OUT
:
t
on
t
off
15
20
--
--
80
70
μ
s
T
j
=-40...+150°C:
d
V
/dt
on
--
--
6
V/
μ
s
T
j
=-40...+150°C:
-d
V
/dt
off
--
--
7
V/
μ
s
Operating Parameters
Operating voltage
4
)
Undervoltage shutdown
Undervoltage restart
Undervoltage restart of charge pump
see diagram page 10
Undervoltage hysteresis
V
bb(under)
=
V
bb(u rst)
-
V
bb(under)
Overvoltage protection
5
)
I
bb
=
40 mA
Standby current, all channels off
V
IN
=
0
Operating current
6)
,
V
IN
=
5V,
T
j
=-40...+150°C
I
GND
=
I
GND1
+
I
GND2
,
T
j
=-40...+150°C:
V
bb(on)
T
j
=-40...+150°C:
V
bb(under)
T
j
=-40...+150°C:
V
bb(u rst)
5.8
2.7
--
--
--
--
--
58
4.7
4.9
7.5
V
V
V
V
T
j
=-40...+150°C:
V
bb(ucp)
5.6
V
bb(under)
--
0.4
--
V
T
j
=-40...+150°C:
V
bb(AZ)
65
70
--
V
T
j
=150°C:
I
bb(off)
--
--
20
70
μ
A
one channel on:
two channels on:
I
GND
--
--
2.2
4.4
--
--
mA
Protection Functions
7)
Initial peak short circuit current limit,
(see timing
diagrams, page 9)
Output clamp (inductive load switch off)
8)
at V
ON(CL)
= V
bb
- V
OUT
Thermal overload trip temperature
Thermal hysteresis
each channel,
T
j
=-40°C:
T
j
=25°C:
T
j
=+150°C:
I
L(SCp)
--
--
4.0
--
10
--
19
--
--
A
two parallel channels
twice the current of one channel
V
ON(CL)
59
--
75
V
T
jt
T
jt
150
--
10
--
--
°C
K
--
4)
At supply voltage increase up to
V
bb
=
5.6
V typ without charge pump,
V
OUT
≈
V
bb
- 2 V
5)
see also
V
ON(CL)
in circuit diagram on page 7.
6
)
Add
I
ST
, if
I
ST
> 0
7)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
8
)
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
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