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參數資料
| 型號： | MC1494 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | LINEAR FOUR-QUADRANT MULTIPLIER INTEGRATED CIRCUIT |
| 中文描述： | 線性四象限乘法器集成電路 |
| 文件頁數： | 11/16頁 |
| 文件大?。?/td> | 319K |
| 代理商： | MC1494 |
MC1494
11
MOTOROLA ANALOG IC DEVICE DATA
Figure 23. Practical Divide Circuit
30 k
62 k
11
12
7
8
RL
50 k
22 k
10 pF
14
1
2
3
6
VO
+15 V
–15 V
MC1494
MC1741CP1
1N5240A
(10 V)
or
Equivalent
VO =
–10 VZ
VX
0 < VX < +10 V
–10 V
≤
VZ
≤
+10 V
–15 V +15 V
P2 20 k
P3 50 k
P1 20 k
2
10
9
6
3
16 k
+
+
+
–
VZ
5
15 13
4
10 pF
510
10 pF
510
4
7
VX
A simpler approach, since it does not involve breaking the
loop (thus making it more practical on a production basis), is:
1.
Set VZ = 0 V and adjust the output offset potentiometer
(P3) until the output voltage (VO) remains at some (not
necessarily zero) constant value as VX is varied
between +1.0 V and +10 V.
2.
Maintain VZ at 0 V, set VX at +10 V and adjust the
Y input offset potentiometer (P1) until VO = 0 V.
3.
With VX = VZ, adjust the X input offset potentiometer
(P2) until the output voltage remains at some (not
necessarily –10 V) constant value as VZ = VX is varied
between +1.0 V and +10 V.
4.
Maintain VX = VZ and adjust the scale factor
potentiometer (RL) until the average value of VO is
–10 V as VZ = VX is varied between +1.0 V and +10 V.
5.
Repeat steps 1 through 4 as necessary to achieve
optimum performance.
Users of the divide circuit should be aware that the
accuracy to be expected decreases in direct proportion to the
denominator voltage. As a result, if VX is set to 10 V and
0.5% accuracy is available, then 5% accuracy can be
expected when VX is only 1.0 V.
In accordance with an earlier statement, VX may have only
one polarity (positive) while VZ may be either polarity.
Figure 24. Basic Square Root Circuit
KVO2 = –VZ
or
VO =
|VZ|
K
VZ
≤
0 V
+
+
+
–
VZ
–
KVO2
X
MC1494
VO
+
Square Root
A special case of the divide circuit in which the two inputs
to the multiplier are connected together results in the square
root function as indicated in Figure 24. This circuit too may
suffer from latch–up problems similar to those of the divide
circuit. Note that only one polarity of input is allowed and
diode clamping (see Figure 25) protects against accidental
latch–up.
This circuit too, may be adjusted in the closed–loop mode:
1.
Set VZ = –0.01 Vdc and adjust P3 (output offset) for
VO = 0.316 Vdc.
2.
Set VZ to –0.9 Vdc and adjust P2 (“X” adjust) for
VO = +3.0 Vdc.
3.
Set VZ to –10 Vdc and adjust P4 (gain adjust) for
VO = +10 Vdc.
4.
Steps 1 through 3 may be repeated as necessary to
achieve desired accuracy.
NOTE
: Operation near 0 V input may prove very inaccurate,
hence, it may not be possible to adjust VO to zero but rather
only to within 100 mV to 400 mV of zero.
AC APPLICATIONS
Wideband Amplifier with Linear AGC
If one input to the MC1494 is a DC voltage and a signal
voltage is applied to the other input, the amplitude of the
output signal can be controlled in a linear fashion by varying
the DC voltage. Hence, the multiplier can function as a DC
coupled, wideband amplifier with linear AGC control.
In addition to the advantage of linear AGC control, the
multiplier has three other distinct advantages over most other
types of AGC systems. First, the AGC dynamic range is
theoretically infinite. This stems from the basic fact that with
0 Vdc applied to the AGC, the output will be zero regardless
of the input. In practice, the dynamic range is limited by the
ability to adjust the input offset adjust potentiometers. By
using cermet multi–turn potentiometers, a dynamic range of
80 dB can be obtained. The second advantage of the
multiplier is that variation of the AGC voltage has no effect on
the signal handling capability of the signal port, nor does it
alter the input impedance of the signal port. This feature is
particularly important in AGC systems which are phase
sensitive. A third advantage of the multiplier is that the output
voltage swing capability and output impedance are
unchanged with variations in AGC voltage.
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