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參數資料
| 型號： | MC1494 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | LINEAR FOUR-QUADRANT MULTIPLIER INTEGRATED CIRCUIT |
| 中文描述： | 線性四象限乘法器集成電路 |
| 文件頁數： | 8/16頁 |
| 文件大小： | 319K |
| 代理商： | MC1494 |
MC1494
8
MOTOROLA ANALOG IC DEVICE DATA
Offset and Scale Factor Adjustment Procedure
The adjustment procedure for the circuit of Figure 18 is:
A.
X Input Offset
1. Connect oscillator (1.0 kHz, 5.0 Vpp sinewave)
to the ‘‘Y’’ input (Pin 9).
2. Connect ‘‘X’’ input (Pin 10) to ground.
3. Adjust X–offset potentiometer, P2 for an AC null
at the output.
B.
Y Input Offset
1. Connect oscillator (1.0 kHz, 5.0 Vpp sinewave)
to the ‘‘X’’ input (Pin 10).
2. Connect ‘‘Y’’ input (Pin 9) to ground.
3. Adjust Y–offset potentiometer, P1 for an AC null
at the output.
C.
Output Offset
1. Connect both ‘‘X’’ and ‘‘Y’’ inputs to ground.
2. Adjust output offset potentiometer, P3 until the
output voltage VO is 0 Vdc.
D.
Scale Factor
1. Apply +10 Vdc to both the ‘‘X’’ and ‘‘Y’’ inputs.
2. Adjust P4 to achieve –10 V at the output.
3. Apply –10 Vdc to both ‘‘X’’ and ‘‘Y’’ inputs and
check for VO = –10 V.
E.
Repeat steps A through D as necessary.
The ability to accurately adjust the MC1494 is dependent on
the offset adjust potentiometers. Potentiometers should be of
the “infinite” resolution type rather than wirewound. Fine
adjustments in balanced–modulator applications may require
two potentiometers to provide “coarse” and “fine” adjustment.
Potentiometers should have low temperature coefficients
and be free from backlash.
Temperature Stability
While the MC1494 provides excellent performance in
itself, overall performance depends to a large degree on the
quality of the external components. Previous discussion
shows the direct dependence on RX, RY and RL and indirect
dependence on R1 (through I1). Any circuit subjected to
temperature variations should be evaluated with these
effects in mind.
Bias Currents
The MC1494 multiplier, like most linear ICs, requires a
DC bias current into its input terminals. The device cannot
be capacitively coupled at the input without regard for this
bias current. If inputs VX and VY are able to supply the
small bias current (
≈
0.5
μ
A) resistors R can be omitted
(see Figure 18). If the MC1494 is used in an AC mode of
operation and capacitive coupling is used the value of
resistor R can be any reasonable value up to 100 k
. For
minimum noise and optimum temperature performance, the
value of resistor R should be as low as practical.
Parasitic Oscillation
When long leads are used on the inputs, oscillation may
occur. In this event, an RC parasitic suppression network
similar to the ones shown in Figure 18 should be connected
directly to each input using short leads. The purpose of the
network is to reduce the “Q” of the source–tuned circuits
which cause the oscillation.
Inability to adjust the circuit to within the specified
accuracy may be an indication of oscillation.
AC OPERATION
General
For AC operation, such as balanced modulation,
frequency doubler, AGC, etc., the op amp will usually be
omitted as well as the output offset adjust potentiometer. The
output offset adjust potentiometer is omitted since the output
will normally be AC coupled and the DC voltage at the output
is of no concern providing it is close enough to zero volts that
it will not cause clipping in the output waveform. Figure 19
shows a typical AC multiplier circuit with a scale factor K
≈
1.
Again, resistor RX and RY are chosen as outlined in the
previous section, with RL chosen to provide the required
scale factor.
Figure 19. Wideband Multiplier
3.0 k
6.2 k
11
RX12
7
8
RY
+15 V –15 V
15
5
14
1
3
16 k
RL
4.7 k
CO
eo
MC1494
+
+
9
R
10
ey
ex
R
6
13
4
51 k
20 k
20 k
2
K = 1
ex (max) = ey(max) = 1.0 V
The offset voltage then existing at the output will be equal
to the offset current times the load resistance. The output
offset current of the MC1494 is typically 17
μ
A and 35
μ
A
maximum. Thus, the maximum output offset would be about
160 mV.
Bandwidth
The bandwidth of the MC1494 is primarily determined by
two factors. First, the dominant pole will be determined by the
load resistor and the stray capacitance at the output terminal.
For the circuit shown in Figure 19, assuming a total output
capacitance (CO) of 10 pF, the 3.0 dB bandwidth would be
approximately 3.4 MHz. If the load resistor were 47 k
, the
bandwidth would be approximately 340 kHz.
Secondly, a “zero” is present in the frequency response
characteristic for both the “X” and “Y” inputs which causes
the output signal to rise in amplitude at a 6.0 dB/octave slope
at frequencies beyond the breakpoint of the “zero”. The
“zero” is caused by the parasitic and substrate capacitance
which is related to resistors RX and RY and the transistors
associated with them. The effect of these transmission
“zeros” is seen in Figures 11 and 12. The reason for this
increase in gain is due to the bypassing of RX and RY at high
frequencies. Since the RY resistor is approximately twice the
value of the RX resistor, the zero associated with the “Y”
input will occur at approximately one octave below the zero
associated with “X” input. For RX = 30 k
and RY = 62 k
,
the zeros occur at 1.5 MHz for the “X” input and 700 kHz for
the “Y” input. These two measured breakpoints correspond
to a shunt capacitance of about 3.5 pF. Thus, for the circuit of
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