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參數資料
| 型號： | MC1GH256DACA-2SA00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | SAMSUNG MultiMediaCard |
| 中文描述： | 三星多媒體 |
| 文件頁數： | 18/102頁 |
| 文件大小： | 1384K |
| 代理商： | MC1GH256DACA-2SA00 |
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MultiMediaCard
TM
18
Sep.22.2005
Revision 0.3
The following sections provide valuable information about the electrical interface.
5.4.1 Power Up
The power-up of the MultiMediaCard bus is handled locally in each card and the bus master. See Figure 5-3
Figure 5-3 : Power-up Diagram
- After power up (including hot insertion, i.e. inserting a card when the bus is operating) the card enters the
idle state
. Dur-
ing this state the card ignores all bus transactions until CMD1 is received.
- The maximum initial load (after power up or hot insertion) that the MultiMediaCard can present on the VDD line shall be
a maximum of 10 uF in parallel with a minimum of 330 ohms. At no time during operation shall the card capacitance on the
VDD line exceed 10 uF
- CMD1 is a special synchronization command used to negotiate the operation voltage range and to poll the card until it is
out of its power-up sequence. Besides the operation voltage profile of the card, the response to CMD1 contains a busy
flag, indicating that the card is still working on its power-up procedure and is not ready for identification. This bit informs
the host that the card is not ready. The host has to wait until this bit is cleared. The card shall complete its initialization
within 1 second from the first CMD1 with a valid OCR range.
- Getting the card out of
idle state
is up to the responsibility of the bus master. Since the power up time and the supply
ramp up time depend on application parameters as the bus length and the power supply unit, the host must ensure that
the power is built up to the operating level (the same level which will be specified in CMD1) before CMD1 is transmitted.
- After power up the host starts the clock and sends the initializing sequence on the CMD line. This sequence is a contigu-
ous stream of logical ‘1’s. The sequence length is the longest of: 1msec, 74 clocks or the supply-ramp-up-time; The addi-
tional 10 clocks (over the 64 clocks after what the card should be ready for communication) is provided to eliminate power-
up synchronization problems.
Every bus master has to implement CMD1. The CMD1 implementation is mandatory for all MultiMediaCards.
Supply voltage
time
Supply ramp up time
Bus master supply voltage
CMD1
CMD1
V
DD
max
Memory field
working
voltage range
Power up time
Initialization delay:
The longest of:
1 msec, 74 clock cycles
or the supply ramp up time
Optional repetitions of CMD1
until the card is responding
with busy bit set.
V
DD
min
CMD2
N
CC
CMD1
N
CC
N
CC
Initialization sequence
Card logic
working
voltage range
First CMD1 to card ready
5.4 Electrical Interface
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