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參數資料
| 型號： | MC68HC16Y1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁數： | 35/122頁 |
| 文件大小： | 749K |
| 代理商： | MC68HC16Y1 |
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MC68HC16Y1
MC68HC16Y1TS/D
MOTOROLA
35
EXOFF — External Clock Off
0 = The CLKOUT pin is driven from an internal clock source.
1 = The CLKOUT pin is placed in a high-impedance state.
FRZSW — Freeze Software Enable
0 = When FREEZE is asserted, the software watchdog continues to run.
1 = When FREEZE is asserted, the software watchdog is disabled.
FRZBM — Freeze Bus Monitor Enable
0 = When FREEZE is asserted, the periodic interrupt timer counters continue to run.
1 = When FREEZE is asserted, the periodic interrupt timer counters are disabled, preventing inter-
rupts during software debug.
CPUD — CPU Development Support Disable
0 = Instruction pipeline signals available on pins IPIPE0 and IPIPE1
1 = Pins IPIPE0 and IPIPE1 placed in high-impedance state unless a breakpoint occurs
CPUD iscleared to zero when the MCU is in an expanded mode, and set to one in single-chip mode.
SLVE — Slave Mode Enable
0 = IMB is not available to an external master.
1 = An external bus master has direct access to the IMB.
This bit is a read-only status bit that reflects the state of DATA11 during reset. Slave mode is used for
factory testing. Reset state is the complement of DATA11 during reset in fully expanded mode.
SHEN[1:0] — Show Cycle Enable
This field determines what the external bus interface does with the external bus during internal transfer
operations. A show cycle allows internal transfers to be externally monitored. The table below shows
whether show cycle data is driven externally, and whether external bus arbitration can occur. To prevent
bus conflict, external peripherals must not be enabled during show cycles.
SUPV — Supervisor/Unrestricted Data Space
The SUPV bit places SCIM global registers in either supervisor data space or user data space. Since
the CPU16 in the MC68HC16Y1 operates only in supervisory mode, SUPV has no effect.
MM — Module Mapping
0 = Internal modules are addressed from $7FF000 – $7FFFFF.
1 = Internal modules are addressed from $FFF000 – $FFFFFF.
The logic state of M determines the value of ADDR23 in the IMB module address. Because AD-
DR[23:20] follow the state of ADDR19 in the MC68HC16Y1, M must be set to one — if M is cleared,
IMB modules will be inaccessible. This bit can be written only once after reset.
ABD — Address Bus Disable
0 = Pins ADDR[2:0] operate normally.
1 = Pins ADDR[2:0] are disabled.
ABD is cleared to zero when the MCU is in an expanded mode, and set to one in single-chip mode. ABD
can be written only once after reset.
SHEN
00
01
10
11
Action
Show cycles disabled, external arbitration enabled
Show cycles enabled, external arbitration disabled
Show cycles enabled, external arbitration enabled
Show cycles enabled, external arbitration enabled;
internal activity is halted by a bus grant
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相關代理商/技術參數 |
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| MC68HC16Z1CAG | 制造商:Freescale Semiconductor 功能描述: |
| MC68HC16Z1CAG16 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC68HC16Z1CAG16 | 制造商:Freescale Semiconductor 功能描述:IC16-BIT MICROCONTROLLER |
| MC68HC16Z1CAG20 | 功能描述:16位微控制器 - MCU 16 BIT MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC68HC16Z1CAG20 | 制造商:Freescale Semiconductor 功能描述:Microcontroller |
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