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參數(shù)資料
| 型號： | MC74HC137 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 1-of-8 Decoder/Demultiplexer with Address Latch |
| 中文描述： | 1 - 8解碼器/解復(fù)用器的地址鎖存 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 210K |
| 代理商： | MC74HC137 |
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
"
!
High–Performance Silicon–Gate CMOS
The MC74HC137 is identical in pinout to the LS137. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
The HC137 decodes a three–bit Address to one–of–eight active–low
outputs. The device has a transparent latch for storage of the Address. Two
Chip Selects, one active–low and one active–high, are provided to facilitate
the demultiplexing, cascading, and chip–selecting functions.
The demultiplexing function is accomplished by using the Address inputs
to select the desired device output, and then by using one of the Chip
Selects as a data input while holding the other one active.
The HC137 is the inverting version of the HC237.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 152 FETs or 38 Equivalent Gates
LOGIC DIAGRAM
5
7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Y7
9
10
11
12
13
14
15
6
4
2
1
CS1
CS2
A0
A1
A2
LATCH ENABLE
ADDRESS
INPUTS
PIN 16 = VCC
PIN 8 = GND
CHIP–
SELECT
INPUTS
TRANS–
PARENT
LATCH
1–OF–8
DECODER
ACTIVE–
LOW
OUTPUTS
3
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
A0
LATCH ENABLE
A2
A1
Y7
CS1
CS2
GND
Y3
Y2
Y1
Y0
VCC
Y5
Y4
Y6
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
1
16
ORDERING INFORMATION
MC74HCXXXN
MC74HCXXXD
Plastic
SOIC
Inputs
Outputs
LE CS1 CS2 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X
X
L
L
L
L
L
L
L
L
H
X
L
H
H
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
X
X
L
L
L
L
H
H
H
H
X
X
X
L
L
H
H
L
L
H
H
X
X
X
L
H
L
H
L
H
L
H
X
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
*
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
FUNCTION TABLE
* = Depends upon the Address previously applied while LE was
at a low level.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74HC137DR2 | 制造商:Motorola 功能描述:ON SEMICONDUCTOR S9G2B |
| MC74HC137F | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:ON Semiconductor 功能描述: |
| MC74HC137N | 制造商:Motorola Inc 功能描述: |
| MC74HC138 | 制造商:Motorola Inc 功能描述: |
| MC74HC138AD | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 2-6V 1-of-8 Decoder RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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