
Direct Page Registers
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
31
$004A
SLIC Data Register 6
(SLCD6)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$004B
SLIC Data Register 5
(SLCD5)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$004C
SLIC Data Register 4
(SLCD4)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$004D
SLIC Data Register 3
(SLCD3)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$004E
SLIC Data Register 2
(SLCD2)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$004F
SLIC Data Register 1
(SLCD1)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$0050
SLIC Data Register 0
(SLCD0)
See page 149.
Read:
R7
R6
R5
R4
R3
R2
R1
R0
Write:
T7
T6
T5
T4
T3
T2
T1
T0
Reset:
0
0
0
0
0
0
0
0
$0051
↓
$005F
Reserved
$FE00
Break Status Register
(BSR)
See page 191.
Read:
R
R
R
R
R
R
SBSW
R
Write:
See note 1
Reset:
0
1. Writing a 0 clears SBSW.
$FE01
SIM Reset Status Register
(SRSR)
See page 131.
Read:
POR
PIN
COP
ILOP
ILAD
MODRST
LVI
0
Write:
POR:
1
0
0
0
0
0
0
0
$FE02
Break Auxiliary
Register (BRKAR)
See page 191.
Read:
0
0
0
0
0
0
0
BDCOP
Write:
Reset:
0
0
0
0
0
0
0
0
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
=Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 7)