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參數資料
| 型號： | MCM62486BFN14 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 32K x 9 Bit BurstRAM Synchronous Static RAM |
| 中文描述： | 32K X 9 CACHE SRAM, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數： | 2/12頁 |
| 文件大小： | 197K |
| 代理商： | MCM62486BFN14 |
MCM62486B
2
MOTOROLA FAST SRAM
BLOCK DIAGRAM
(See Note)
DQ0 – DQ8
S0
S1
K
A0 – A14
W
G
B
C
CLR
Q0
Q1
A0
A1
ADDRESS
REGISTER
WRITE
REGISTER
ENABLE
REGISTER
DATA–IN
REGISTERS
OUTPUT
BUFFER
32K x 9
MEMORY
ARRAY
ADV
BURST LOGIC
INTERNAL
ADDRESS
A0
′
A1
′
15
9
9
15
2
A2 – A14
A1 – A0
ADSC
ADSP
9
NOTE:
All registers are positive–edge triggered. The ADSC or ADSP signals control the duration of the burst and the start of the
next burst. When ADSP is sampled low, any ongoing burst is interrupted and a read (independent of W and ADSC) is per-
formed using the new external address. When ADSC is sampled low (and ADSP is sampled high), any ongoing burst is
interrupted and a read or write (dependent on W) is performed using the new external address. Chip selects (S0, S1) are
sampled only when a new base address is loaded. After the first cycle of the burst, ADV controls subsequent burst cycles.
When ADV is sampled low, the internal address is advanced prior to the operation. When ADV is sampled high, the internal
address is not advanced, thus inserting a wait state into the burst sequence accesses. Upon completion of a burst, the
address will wrap around to its initial state. See
BURST SEQUENCE TABLE
.
BURST SEQUENCE TABLE
(See Note)
External Address
A14 – A2
A1
A0
1st Burst Address
A14 – A2
A1
A0
2nd Burst Address
A14 – A2
A1
A0
3rd Burst Address
A14 – A2
A1
A0
NOTE: The burst wraps around to its initial state upon completion.
相關PDF資料 |
PDF描述 |
|---|---|
| MCM62486BFN19 | Replaced by PTH12000W : |
| MCM6249 | 1M x4 Bit Static Random Access Memory |
| MCM6249WJ20 | 1M x4 Bit Static Random Access Memory |
| MCM6249WJ20R2 | 1M x4 Bit Static Random Access Memory |
| MCM6249WJ35R2 | 1M x4 Bit Static Random Access Memory |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCM62486BFN19 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32K x 9 Bit BurstRAM Synchronous Static RAM |
| MCM6249 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x4 Bit Static Random Access Memory |
| MCM6249WJ20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x4 Bit Static Random Access Memory |
| MCM6249WJ20R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x4 Bit Static Random Access Memory |
| MCM6249WJ25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x4 Bit Static Random Access Memory |
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