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參數(shù)資料
| 型號： | MF10AJ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Universal Monolithic Dual Switched Capacitor Filter |
| 中文描述： | DUAL SWITCHED CAPACITOR FILTER, RESISTOR PROGRAMMABLE, UNIVERSAL, CDIP20 |
| 封裝： | 0.300 INCH, CERAMIC, DIP-20 |
| 文件頁數(shù)： | 2/20頁 |
| 文件大小： | 405K |
| 代理商： | MF10AJ |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
a
b
V
b
)
Voltage at Any Pin
14V
V
a
a
0.3V
V
b
b
0.3V
Input Current at Any Pin (Note 2)
5 mA
Package Input Current (Note 2)
20 mA
Power Dissipation (Note 3)
500 mW
150
§
C
2000V
Storage Temperature
ESD Susceptability (Note 11)
Soldering Information
N Package: 10 sec.
J Package: 10 sec.
SO Package: Vapor Phase (60 Sec.)
Infrared (15 Sec.)
260
§
C
300
§
C
215
§
C
220
§
C
See AN-450 ‘‘Surface Mounting Methods and Their Effect
on Product Reliability’’ (Appendix D) for other methods of
soldering surface mount devices.
Operating Ratings
(Note 1)
Temperature Range
T
MIN
s
T
A
s
T
MAX
0
§
C
s
T
A
s
70
§
C
0
§
C
s
T
A
s
70
§
C
b
40
§
C
s
T
A
s
85
§
C
b
55
§
C
s
T
A
s
125
§
C
MF10ACN, MF10CCN
MF10CCWM, MF10ACWM
MF10CCJ
MF10AJ
Electrical Characteristics
V
a
e a
5.00V and V
b
e b
5.00V unless otherwise specified.
Boldface limits
apply for T
MIN
to T
MAX
;
all other limits T
A
e
T
J
e
25
§
C.
MF10ACN, MF10CCN,
MF10ACWM, MF10CCWM
MF10CCJ, MF10AJ
Symbol
Parameter
Conditions
TypicalLimit
(Note 8)
Design
Limit
TypicalLimit
(Note 8)
Design Units
Limit
(Note 9) (Note 10)
(Note 9) (Note 10)
V
a
b
V
b
Supply Voltage
Min
9
9
V
Max
14
14
V
I
S
Maximum Supply
Current
Clock Applied to Pins 10 & 11
No Input Signal
f
O
c
Q
k
200 kHz
8
12
12
8
12
mA
f
O
Center Frequency Min
Range
0.1
0.2
0.1
0.2
Hz
Max
30
20
30
20
kHz
f
CLK
Clock Frequency
Range
Min
5.0
10
5.0
10
Hz
Max
MF10A Q
e
10
1.5
1.0
1.5
1.0
MHz
f
CLK
/f
O
50:1 Clock to
Center FrequencyMF10CMode 1
V
pin12
e
5V
f
CLK
e
250 kHz
g
0.2
g
0.6
g
0.6
g
0.2
g
1.0
%
g
0.2
g
1.5
g
1.5
g
0.2
g
1.5
%
f
CLK
/f
O
100:1 Clock to
Center FrequencyMF10CMode 1
MF10A Q
e
10
V
pin12
e
0V
f
CLK
e
500 kHz
g
0.2
g
0.6
g
0.6
g
0.2
g
1.0
%
g
0.2
g
1.5
g
1.5
g
0.2
g
1.5
%
Clock Feedthrough
Q
e
10
Mode 1
Q
e
10
Mode 1
10
10
mV
Q Error (MAX)
(Note 4)
V
pin12
e
5V
f
CLK
e
250 kHz
V
pin12
e
0V
f
CLK
e
500 kHz
g
2
g
6
g
6
g
2
g
10
%
g
2
g
6
g
6
g
2
g
10
%
H
OLP
V
OS1
V
OS2
DC Lowpass Gain
Mode 1 R1
e
R2
e
10k
0
g
0.2
g
0.2
g
20
b
185
b
85
0
g
0.2
g
20
b
185
b
85
dB
DC Offset Voltage (Note 5)
g
5.0
b
150
g
20
b
185
b
85
g
5.0
b
150
mV
DC Offset Voltage Min
(Note 5)
V
pin12
e a
5V
(f
CLK
/f
O
e
50)
S
A/B
e
V
a
mV
Max
Min
V
pin12
e a
5V
(f
CLK
/f
O
e
50)
S
A/B
e
V
b
b
70
b
70
mV
Max
V
OS3
DC Offset Voltage Min
(Note 5)
V
pin12
e a
5V
(f
CLK
/f
O
e
50)
All Modes
b
70
b
100
b
20
b
100
b
20
b
70
b
100
b
20
mV
Max
V
OS2
DC Offset Voltage
(Note 5)
V
pin12
e
0V
(f
CLK
/f
O
e
100)
V
pin12
e
0V
(f
CLK
/f
O
e
100)
V
pin12
e
0V
(f
CLK
/f
O
e
100)
S
A/B
e
V
a
b
300
b
300
mV
S
A/B
e
V
b
b
140
b
140
mV
(Note 5)
V
OS3
DC Offset Voltage
(Note 5)
All Modes
b
140
b
140
mV
2
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| MF10CCJ | Universal Monolithic Dual Switched Capacitor Filter |
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