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參數(shù)資料
| 型號： | Q67060-S6302-A4 |
| 廠商： | SIEMENS AG |
| 英文描述： | High Speed CMOS Logic Dual 4-Stage Static Shift Registers 16-SOIC -55 to 125 |
| 中文描述： | 智能雙通道阻抗高側(cè)電源開關(guān) |
| 文件頁數(shù)： | 3/14頁 |
| 文件大小： | 191K |
| 代理商： | Q67060-S6302-A4 |
BTS 611 L1
Semiconductor Group
3
Thermal Characteristics
Parameter and Conditions
Symbol
Values
typ
Unit
min
max
3.5
7.0
75
Thermal resistance
chip - case, both channels:
each channel:
junction - ambient (free air):
SMD version, device on PCB
5)
:
R
thJC
R
thJA
--
--
--
--
--
--
K/W
37
5
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
μ
m thick) copper area for Vbb
connection. PCB is vertical without blown air.
Electrical Characteristics
Parameter and Conditions,
each channel
at T
j
= 25 °C, V
bb
= 12 V unless otherwise specified
Symbol
Values
typ
Unit
min
max
Load Switching Capabilities and Characteristics
On-state resistance (pin 4 to 1 or 7)
I
L
= 1.8 A
each channel
Nominal load current, ISO Norm (pin 4 to 1 or 7)
V
ON
= 0.5 V, T
C
= 85 °C
T
j
=25 °C:
T
j
=150 °C:
R
ON
--
160
320
2.3
4.4
200
400
m
each channel:
both channels parallel:
I
L(ISO)
1.8
3.5
--
--
A
Output current (pin
1
or 7) while GND disconnected
or GND pulled up, V
bb
=30 V, V
IN
= 0, see diagram
page 8
Turn-on time
Turn-off time
R
L
= 12
,
T
j
=-40...+150°C
Slew rate on
10 to 30% V
OUT
,
R
L
= 12
,
T
j
=-40...+150°C
Slew rate off
70 to 40% V
OUT
, R
L
= 12
,
T
j
=-40...+150°C
I
L(GNDhigh)
--
--
10
mA
IN
IN
to 90% V
OUT
:
to 10% V
OUT
:
t
on
t
off
80
80
200
200
400
400
μ
s
dV dt
on
0.1
--
1
V/
μ
s
-dVdt
off
0.1
--
1
V/
μ
s
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