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參數資料
| 型號： | Q67060-S6307-A7 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | High Speed CMOS Logic Quad Bilateral Switches 14-PDIP -55 to 125 |
| 中文描述： | 智能感知高端功率開關 |
| 文件頁數： | 7/15頁 |
| 文件大小： | 240K |
| 代理商： | Q67060-S6307-A7 |
BTS 640 S2
Semiconductor Group
Page 7
2003-Oct-01
Truth Table
Input
Output
Status
Current
Sense
level
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
level
L
H
L
H
L
L
16
)
L
L
H
H
L
19
)
H
L
L
L
L
L
level
H
L
H
H
H
H
H
H
L
17
)
L
H (L
20
)
)
L
H
L
H
L
H
IIS
0
Normal
operation
Current-
limitation
Short circuit to
GND
Over-
temperature
Short circuit to
V
bb
Open load
nominal
0
0
0
0
0
0
0
<nominal
18
)
0
0
0
0
0
0
0
Undervoltage
Overvoltage
Negative output
voltage clamp
L = "Low" Level
H = "High" Level
X = don't care
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
Z = high impedance, potential depends on external circuit
16
) The voltage drop over the power transistor is
V
bb
-
V
OUT
>typ.3V. Under this condition the sense current
I
IS
is
zero
17)
An external short of output to V
bb
, in the off state, causes an internal current from output to ground. If R
GND
is used, an offset voltage at the GND and ST pins will occur and the V
ST low
signal may be errorious.
18
) Low ohmic short to
V
bb
may reduce the output current
I
L
and therefore also the sense current
I
IS
.
19
) Power Transistor off, high impedance
20
) with external resistor between pin 4 and pin 6&7
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