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參數(shù)資料
| 型號： | DS2740U+T&R |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 304K |
| 描述： | IC CURRENT GAUGE(15BIT) 8UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 3,000 |
| 功能： | 電流計（15 位） |
| 輸入電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-uMAX |
| 包裝： | 帶卷 (TR) |
DS2740
Table 2. DETAILED PIN DESCRIPTIONS
PIN
SYMBOL
DESCRIPTION
OVD
1
1-Wire Bus Speed Control. Input logic level selects the speed of the 1-
Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard
timing (STD). On a multidrop bus, all devices must operate at same
speed.
PIO
2
Programmable I/O Pin. Programmed as input or output through internal
registers. Open-drain output sufficient for LED or vibrator activation.
SNS
3
Current-Sense Resistor Input
IS2
4
Current-Sense Input. Connected to SNS through a 10k& resistor to
allow filtering of the current waveform by an external capacitor.
IS1
5
Current-Sense Input. Connected to V
SS
through a 10k& resistor to allow
filtering of the current waveform through an external capacitor.
V
SS
6
Device Ground, Current-Sense Resistor Return. Connect directly to
the negative terminal of the battery cell.
DQ
7
Data I/O Pin. Operates bidirectionally with open-drain output driver.
Internal 1礎(chǔ) pulldown aids in sensing pack removal and Sleep-mode
activation.
V
DD
8
Power-Supply Input. Connects to system voltage supply or positive
terminal of battery cell.
Figure 2. APPLICATION EXAMPLE
DS2740
VDD
VSS
DQ
PIO
DATA
2.7V to 5.5V
System Supply or
Battery Pack Positive
Connection
To
Battery
Negative
SNS
PIO
IS1
IS2
104
150
330
R
SNS
104
System
GND
OVD
*
*
* 5.6V zener recommended for ESD protection when DATA or PIO
contacts exposed, such as a removable battery pack application
150
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