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參數資料
| 型號： | L9310 |
| 英文描述： | Line Interface and Line Access Circuit Full-Feature SLIC,Ringing Relay,and Test Access Device |
| 中文描述： | 線路接口和線路接入電路全功能用戶接口，振鈴繼電器，測試接入設備 |
| 文件頁數： | 6/60頁 |
| 文件大小： | 1053K |
| 代理商： | L9310 |
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Data Sheet
July 2001
Full-Feature SLIC, Ringing Relay, and Test Access Device
L9310 Line Interface and Line Access Circuit
6
Agere Systems Inc.
Description
(continued)
Both the ring trip and loop closure supervision func-
tions are included. Loop closure threshold is set by
applying a voltage source to the LCTH input. The volt-
age source may be an external voltage source or
derived from the SLIC V
REF
output. A programmable
external voltage source may be used to provide soft-
ware control of the loop closure threshold. Design
equations for the loop closure threshold are given in
the Supervision section of this data sheet.
Hysteresis is
included.
The ring trip detector requires only a single-pole filter at
the input. This will minimize the required number of
external components. To help minimize device power
dissipation, the ring trip detector is active only during
the power ring mode.
Ring trip and loop supervision status outputs appear in
a common output pin, NSTAT. NSTAT is an unlatched
supervision output; thus, an interrupt-based control
scheme may be used.
The dc current limit is set in the active modes via an
applied voltage source. The voltage source may be an
external voltage source. The voltage may be derived
via a resistor divider network from the V
REF
SLIC out-
put. A programmable external voltage source may be
used to provide software control of the loop closure
threshold. Design equations for this feature are given in
the dc Characteristics section of this data sheet.
Programming range is 10 mA to 70 mA, with a maxi-
mum 2.5 Vrms meter pulse at tip and ring. Program-
ming range is 10 mA to 45 mA, with a maximum 5 Vrms
meter pulse at tip and ring.
Overhead is programmable in the active modes via an
applied voltage
source. The voltage source may be an
external voltage source or derived via a resistor divider
network from the V
REF
SLIC output.
A programmable external voltage source may be used
to provide software control of the overhead voltage. A
potential application of this feature is to increase over-
head during meter pulse injection and reduce overhead
during periods of nonmeter pulse injection. The rate of
change of the overhead voltage may be controlled by
use of a single external capacitor at the C
F1
node. If the
rate of change is uncontrolled, there may be audible
noise associated with this transition. Design equations
for this feature are given in the dc Characteristics sec-
tion of this data sheet.
If the overhead is not programmed via a resistor, the
device develops a default overhead adequate for a
3.14 dBm overload into 900
. For the default over-
head, OVH is connected to ground.
Overhead is not changed when the PPM input is turned
on. Sufficient overhead to pass meter pulse signals
must be set at OVH input.
The L9310 provides line test capability. In the test
mode, a voltage
proportional to the ac or dc tip to
ground, ring to
ground, tip to ring voltage or current
may be presented at the SLIC TESTLEV output.
An ac test tone may also be applied to a test input,
TESTSIG, or through the codec RCVN/RCVP interface.
TESTSIG input is active upon entering a test state and
remains active after leaving the test mode. By varying
the frequency of the applied test tone, parameters such
as line capacitance may be measured.
TESTSIG should be externally connected to the
device’s V
REF
if it is not used during a test condition.
This may be done by a high-impedance pull-up resis-
tor. Additionally, TESTSIG should be ac coupled to the
test signal generator.
Test level outputs at TESTLEV are referenced to the
internally generated reference voltage V
REF
. This refer-
ence voltage may also be output at TESTLEV so the
users can compensate test results at TESTLEV for the
internal reference.
Note that during nontest modes, TESTLEV is high
impedance to conserve power. Input TESTSIG is
turned off during any nontest mode and during the V
REF
test mode.
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相關代理商/技術參數 |
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| L9313 | 制造商:AGERE 制造商全稱:AGERE 功能描述:Line Interface and Line Access Circuit Full-Feature SLIC and Ringing for TR-57 Applications |
| L9324 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual Peripheral Driver |
| L9326 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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