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參數資料
| 型號： | MC68B912B32FU8 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-Bit Microcontroller |
| 中文描述： | 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數： | 7/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68B912B32FU8 |
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MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
7
2.2 Data Types
The CPU12 supports the following data types:
Bit data
8-bit and 16-bit signed and unsigned integers
16-bit unsigned fractions
16-bit addresses
A byte is eight bits wide and can be accessed at any byte location. A word is composed of two consec-
utive bytes with the most significant byte at the lower value address. There are no special requirements
for alignment of instructions or operands.
2.3 Addressing Modes
Addressing modes determine how the CPU accesses memory locations to be operated upon. The
CPU12 includes all of the addressing modes of the M68HC11 CPU as well as several new forms of in-
dexed addressing.
Table 2
is a summary of the available addressing modes.
Table 2 M68HC12 Addressing Mode Summary
Addressing Mode
Source Format
INST
(no externally supplied
operands)
INST #
or
INST #
opr16i
Abbreviation
Description
Inherent
INH
Operands (if any) are in CPU registers
Immediate
opr8i
IMM
Operand is included in instruction stream
8- or 16-bit size implied by context
Direct
INST
opr8a
DIR
Operand is the lower 8-bits of an address in the
range $0000 – $00FF
Operand is a 16-bit address
Extended
INST
opr16a
INST
rel8
or
INST
rel16
EXT
Relative
REL
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction
Indexed
(5-bit offset)
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto post-
decrement)
Indexed
(auto post-increment)
Indexed
(accumulator offset)
Indexed
(9-bit offset)
Indexed
(16-bit offset)
INST
oprx5
,
xysp
IDX
5-bit signed constant offset from x, y, sp, or pc
INST
oprx3
,–
xys
IDX
Auto pre-decrement x, y, or sp by 1 ~ 8
INST
oprx3
,+
xys
IDX
Auto pre-increment x, y, or sp by 1 ~ 8
INST
oprx3
,
xys
–
IDX
Auto post-decrement x, y, or sp by 1 ~ 8
INST
oprx3
,
xys
+
IDX
Auto post-increment x, y, or sp by 1 ~ 8
INST
abd
,
xysp
IDX
Indexed with 8-bit (A or B) or 16-bit (D) accumu-
lator offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
INST
oprx9
,
xysp
IDX1
INST
oprx16
,
xysp
IDX2
Indexed-Indirect
(16-bit offset)
INST [
oprx16
,
xysp
]
[IDX2]
Indexed-Indirect
(D accumulator
offset)
INST [D,
xysp
]
[D,IDX]
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
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