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參數資料
型號: MC68HC705V8
廠商: Motorola, Inc.
英文描述: 8-Bit Microcontroller Units (MCU).(8位微控制器)
中文描述: 8位微控制器單元(MCU)。(8位微控制器)
文件頁數: 9/28頁
文件大小: 220K
代理商: MC68HC705V8
AN1224/D
MOTOROLA
9
access of the MRSR will clear the interrupt and reset the RXMS bit in the MSR. Once the user has
retrieved any data bytes of interest from a received message, a write to the MRSR will release the Rx
buffer back to the MDLC module. If another message has already been placed in the other Rx buffer, this
buffer will then be made available to the CPU, the RXMS bit will again be set, and another interrupt of the
CPU will be generated. Once the MDLC has stored a received message in each Rx buffer, it will ignore any
further frames being transmitted onto the multiplex bus until the user releases one of the Rx buffers.
The MDLC module can also be used to receive messages containing large blocks of data. This type of
message violates the J1850 message frame length constraints, and will normally be used only in a
manufacturing or diagnostic environment. To utilize this feature, the user sets the receive block mode
(RXBM) bit in the MCR. When this bit is set, once a valid SOF delimiter is detected by the MDLC, it will
begin loading data bytes into an Rx buffer. As soon as that Rx buffer is filled, the MDLC will make that
buffer available to the CPU and begin filling the other buffer. This will continue until the MDLC detects a
valid EOD symbol. Each time an Rx buffer is filled, the number of bytes contained in the MRSR will only
reflect the number of bytes in that Rx buffer, not a cumulative total. The MDLC will also calculate a
cumulative CRC byte. Once the EOD symbol is received, the MDLC will verify that the cumulative CRC is
equal to $C4, just as with a normal message reception. Once the complete message has been received
error-free, the MDLC will clear the RXBM bit in the MCR and return to the normal reception mode. If the
MDLC detects an error during a block mode reception, the RXBM bit will also be cleared, and the MDLC
will again return to the normal mode of operation. The MDLC cannot be used to transmit block mode
messages.
Due to the nature of the J1850 bus, each node must receive every frame it transmits to ensure proper
arbitration and error-detection. Therefore, the MDLC module will receive, and pass along to the user, every
message that it successfully transmits on to the multiplex bus. This feature can allow a node's software to
handle a received message that it has transmitted in the same way it would handle a message received
from another node in the system. This feature can also be used to determine whether or not a loss of
arbitration or a transmission error has occurred during a transmission attempt.
Error Detection
The MDLC uses a variety of methods to ensure the data transmitted onto or received from the multiplex
bus is error-free. These include a digital input filter, CRC generation and checking, and a constant
monitoring of bit and symbol timing, as well as message framing.
All data received from the multiplex bus passes through a digital filter. This filter removes short noise
pulses from the input signal, which could otherwise corrupt the data being received. The "cleaned up"
signal is then passed to the symbol decoder, which decodes the data stream, determining what each bit or
symbol is, whether it is of the proper length, and that the message is framed properly.
The CRC byte is calculated by the MDLC as it transmits a frame onto the multiplex bus and is then
appended to the message following the data portion of the frame. The CRC of any message the MDLC
receives, including messages it has transmitted, is checked, and if it is not correct, the frame is discarded.
For more information on the different methods of error detection and notification used by the MDLC
module, refer to the
MC68HC705V8 Product Specification
.
Physical Layer Transceiver
One unique feature of the MC68HC705V8 is the analog transceiver necessary for interfacing the MDLC
module to the multiplex bus physical layer, which is integrated directly onto the MCU. Because of this, only
a few discrete components are necessary to complete the connection to the physical layer, and to ensure
protection from the extreme transients common in the automotive environment. The MDLC transceiver is
designed to transmit and receive messages with a dominant voltage level of 7 V (nominal), as specified in
the J1850 document. Two external resistors are used to "tune" the rise and fall times of the waveform, and
相關PDF資料
PDF描述
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