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參數資料
| 型號： | MC2GH512DMCA-2SA00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | SAMSUNG MultiMediaCard |
| 中文描述： | 三星多媒體 |
| 文件頁數： | 22/102頁 |
| 文件大小： | 1384K |
| 代理商： | MC2GH512DMCA-2SA00 |
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MultiMediaCard
TM
22
Sep.22.2005
Revision 0.3
Parameter
Symbol
Min
Max.
Unit
Remark
Clock CLK
a
Clock frequency Data Transfer Mode (PP)
b
a.All timing values are measured relative to 50% of voltage level
b.A MultiMediaCard shall support the full frequency range from 0-26Mhz, or 0-52MHz
c.Rise and fall times are measured from 10%-90% of voltage level
d.Rise and fall times are measured from 10%-90% of voltage level
f
PP
0
26/52
MHz
C
L
<= 30 pF
Tolerance: +100KHz
Tolerance: +20KHz
Clock frequency Identification Mode (OD)
f
OD
t
WL
t
TLH
t
THL
0
400
kHz
Clock low time
6.5
ns
C
L
<= 30 pF
C
L
<= 30 pF
C
L
<= 30 pF
Clock rise time
c
Clock fall time
3
ns
3
ns
Inputs CMD, DAT
(referenced to CLK)
Input set-up time
t
ISU
t
IH
3
ns
C
L
<= 30 pF
C
L
<= 30 pF
Input hold time
3
ns
Outputs CMD, DAT
(referenced to CLK)
Output set-up time
t
OSU
t
OH
t
rise
t
fall
5
ns
C
L
<= 30 pF
C
L
<= 30 pF
C
L
<= 30 pF
C
L
<= 30 pF
Output hold time
5
ns
Signal rise time
d
Signal fall time
3
ns
3
ns
Parameter
Symbol
Min
Max.
Unit
Remark
Clock CLK
a
Clock frequency Data Transfer Mode (PP)
a.All timing values are measured relative to 50% of voltage level
b.Clock rise and fall times are measured from VIL to VIH of voltage level
f
PP
f
OD
t
WL
t
TLH
t
THL
0
20
MHz
C
L
<= 30 pF
Clock frequency Identification Mode (OD)
0
400
kHz
Clock low time
10
ns
C
L
<= 30 pF
C
L
<= 30 pF
C
L
<= 30 pF
Clock rise time
b
Clock fall time
10
ns
10
ns
Inputs CMD, DAT
(referenced to CLK)
Input set-up time
t
ISU
t
IH
3
ns
C
L
<= 30 pF
C
L
<= 30 pF
Input hold time
3
ns
Outputs CMD, DAT
(referenced to CLK)
Output set-up time
t
OSU
t
OH
13.1
ns
C
L
<= 30 pF
C
L
<= 30 pF
Output hold time
9.7
ns
Table 5-9 : High Speed Card Interface Timings
Table 5-10 : Backwards Compatible Card Interface Timing
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