- 您現在的位置：買賣IC網 > PDF目錄371053 > MC68HC916X1 (Motorola, Inc.) 16-Bit Modular Microcontroller(16位模塊化微控制器) PDF資料下載
參數資料
| 型號： | MC68HC916X1 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Modular Microcontroller(16位模塊化微控制器) |
| 中文描述： | 16位微控制器模塊（16位模塊化微控制器） |
| 文件頁數： | 34/172頁 |
| 文件大小： | 1035K |
| 代理商： | MC68HC916X1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁
MOTOROLA
34
MC68HC916X1
MC68HC916X1TS/D
3.7.4 Power-On Reset
When the SCIM clock synthesizer is used to generate system clocks, power-on reset involves spe-
cial circumstances related to the application of system and clock synthesizer power. Regardless of
clock source, voltage must be applied to the clock synthesizer power input pin V
DDSYN
, so that the
MCU can operate. The following discussion assumes that V
DDSYN
is applied before and during re-
set. This minimizes crystal start-up time. When V
DDSYN
is applied at power-on, start-up time is af-
fected by specific crystal parameters and by oscillator circuit design. V
DD
ramp-up time also affects
pin state during reset.
During power-on reset, an internal circuit in the SCIM drives the IMB internal and external reset
lines. The circuit releases the internal reset line as V
DD
ramps up to the minimum specified value,
and SCIM pins are initialized. When V
DD
reaches the specified minimum value, the clock synthe-
sizer VCO begins operation. Clock frequency ramps up to the specified limp mode frequency. The
external RESET line remains asserted until the clock synthesizer PLL locks and 512 CLKOUT cy-
cles elapse.
The SCIM clock synthesizer provides clock signals to the other MCU modules. After the clock is
running and the internal reset signal is asserted for four clock cycles, these modules reset. V
DD
ramp time and VCO frequency ramp time determine how long these four cycles take. Worst case
is approximately 15 milliseconds. During this period, module port pins may be in an indeterminate
state. While input-only pins can be put in a known state by means of external pull-up resistors, ex-
ternal logic on input/output or output-only pins must condition the lines during this time. Active driv-
ers require high-impedance buffers or isolation resistors to prevent conflict.
3.7.5 Use of Three-State Control Pin
Asserting the three-state control (TSC) input causes all MCU output drivers to go to an inactive,
high-impedance condition. Although TSC is an active-high input, it does not have an internal pull-
down and must be tied low when not in use.
TSC must remain asserted for ten system clock cycles for drivers to change state. There are certain
constraints on use of TSC during power-up reset.
When the internal clock synthesizer is used (MODCLK held high during reset), synthesizer ramp-
up time affects how long ten clock cycles take. Worst case is approximately 20 milliseconds from
TSC assertion.
When an external clock signal is applied (MODCLK held low during reset), pins go to high-imped-
ance state as soon after TSC assertion as ten clock pulses have been applied to the EXTAL pin.
NOTE
When TSC assertion takes effect, internal signals are forced to values that can
cause inadvertent mode selection. Once the output drivers change state, the MCU
must be powered down and restarted before normal operation can resume.
3.8 Interrupts
Interrupt recognition and servicing involve complex interaction between the central processing unit,
the single-chip integration module, and a device or module requesting interrupt service.
The CPU16 provides for seven levels of interrupt priority (1–7), seven automatic interrupt vectors,
and 200 assignable interrupt vectors. All interrupts with priorities less than seven can be masked
by the interrupt priority (IP) field in the condition code register. The CPU16 handles interrupts as a
type of asynchronous exception.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68HC9D60 | Advance Information - Rev 4.0 |
| MC68HC12D60 | Advance Information - Rev 4.0 |
| MC68HCL05C8A | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| MC68HSC05C8A | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| MC68HCP11 | 8-Bit Microcontrollers |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC68HC98LJ12CFU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HC98LJ12CFUE | 功能描述:8位微控制器 -MCU 8 BIT MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MC68HC9S08RC60 L33R DIE | 制造商:Motorola Inc 功能描述: |
| MC68HCP11A1CFN3 | 功能描述:8位微控制器 -MCU 8-bit HCMOS single chip MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MC68HCP11A1FN | 制造商:MOTORALA 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。