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參數資料
| 型號： | MC68B912B32 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V 100ppm/Degrees C, 50uA in SOT23-3 Series (Bandgap) Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 16位微控制器 |
| 文件頁數： | 25/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68B912B32 |
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MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
25
5 Operating Modes and Resource Mapping
Eight possible operating modes determine the operating configuration of the MC68HC912B32. Each
mode has an associated default memory map and external bus configuration. After reset, most system
resources can be mapped to other addresses by writing to the appropriate control registers.
5.1 Operating Modes
The operating mode out of reset is determined by the states of the BKGD, MODB, and MODA pins dur-
ing reset.
The SMODN, MODB, and MODA bits in the MODE register show current operating mode and provide
limited mode switching during operation. The states of the BKGD, MODB, and MODA pins are latched
into these bits on the rising edge of the reset signal. During reset an active pull-up is connected to the
BKGD pin (as input) and active pulldowns are connected to the MODB and MODA pins. If an open oc-
curs on any of these pins, the device will operate in normal single-chip mode.
There are two basic types of operating modes:
Normal modes — some registers and bits are protected against accidental changes.
Special modes — allow greater access to protected control registers and bits for special purposes such
as testing and emulation.
A system development and debug feature, background debug mode (BDM), is available in all modes.
In special single-chip mode, BDM is active immediately after reset.
5.1.1 Normal Operating Modes
These modes provide three operating configurations. Background debugging is available in all three
modes, but must first be enabled for some operations by means of a BDM command. BDM can then be
made active by another BDM command.
Normal Expanded Wide Mode
— This is a normal mode of operation in which the address and data
are multiplexed onto ports A and B. ADDR[15:8] and DATA[15:8] are present on port A. ADDR[7:0] and
DATA[7:0] are present on port B.
Normal Expanded Narrow Mode
— Port A is configured as the high byte of address multiplexed with
the 8-bit data bus. Port B is configured as the lower 8-bit address bus. This mode is used for lower cost
production systems that use 8-bit wide external EEPROMs or RAMs. Such systems take extra bus cy-
cles to access 16-bit locations but this may be preferred over the extra cost of additional external mem-
ory devices.
Table 9 Mode Selection
BKGD
0
0
0
0
1
1
1
1
MODB
0
0
1
1
0
0
1
1
MODA
0
1
0
1
0
1
0
1
Mode
Port A
Port B
Special Single Chip
Special Expanded Narrow
Special Peripheral
Special Expanded Wide
Normal Single Chip
Normal Expanded Narrow
Reserved (Forced to Peripheral)
Normal Expanded Wide
General-Purpose I/O
ADDR[15:8]/DATA[15:0]
ADDR/DATA
ADDR/DATA
General-Purpose I/O
ADDR[15:8]/DATA[15:0]
—
ADDR/DATA
General-Purpose I/O
ADDR[7:0]
ADDR/DATA
ADDR/DATA
General-Purpose I/O
ADDR[7:0]
—
ADDR/DATA
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