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參數資料
| 型號： | MC68B912B32 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V 100ppm/Degrees C, 50uA in SOT23-3 Series (Bandgap) Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 16位微控制器 |
| 文件頁數： | 28/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68B912B32 |
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MOTOROLA
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MC68HC912B32
MC68HC912B32TS/D
EME — Emulate Port E
Removing the registers from the map allows the user to emulate the function of these registers exter-
nally. In single-chip mode PORTE and DDRE are always in the map regardless of the state of this bit.
0 = PORTE and DDRE are in the memory map.
1 = PORTE and DDRE are removed from the internal memory map (expanded mode).
Normal modes: write once; special modes: write anytime EXCEPT the first time. Read anytime.
5.3 Internal Resource Mapping
The internal register block, RAM, Flash EEPROM and EEPROM have default locations within the 64-
Kbyte standard address space but may be reassigned to other locations during program execution by
setting bits in mapping registers INITRG, INITRM, and INITEE. During normal operating modes these
registers can be written once. It is advisable to explicitly establish these resource locations during the
initialization phase of program execution, even if default values are chosen, in order to protect the reg-
isters from inadvertent modification later.
Writes to the mapping registers go into effect between the cycle that follows the write and the cycle after
that. To assure that there are no unintended operations, a write to one of these registers should be fol-
lowed with a NOP instruction.
If conflicts occur when mapping resources, the register block will take precedence over the other re-
sources; RAM, Flash EEPROM, or EEPROM addresses occupied by the register block will not be avail-
able for storage. When active, BDM ROM takes precedence over other resources although a conflict
between BDM ROM and register space is not possible.
Table 10
shows resource mapping precedence.
All address space not utilized by internal resources is by default external memory. The memory expan-
sion module manages three memory overlay windows: program, data, and one extra page overlay. The
size and location of the program and data overlay windows are fixed. One of two locations can be se-
lected for the extra page (EPAGE).
5.3.1 Register Block Mapping
After reset the 512 byte register block resides at location $0000 but can be reassigned to any 2-Kbyte
boundary within the standard 64-Kbyte address space. Mapping of internal registers is controlled by five
bits in the INITRG register. The register block occupies the first 512 bytes of the 2-Kbyte block.
REG[15:11] — Internal register map position
These bits specify the upper five bits of the 16-bit registers address.
Write once in normal modes or anytime in special modes. Read anytime.
Table 10 Mapping Precedence
Precedence
1
2
3
4
5
6
Resource
BDM ROM (if active)
Register Space
RAM
EEPROM
Flash EEPROM
External Memory
INITRG —
Initialization of Internal Register Position Register
$0011
Bit 7
6
5
4
3
2
1
Bit 0
REG15
REG14
REG13
REG12
REG11
0
0
MMSWAI
RESET:
0
0
0
0
0
0
0
0
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