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參數(shù)資料
| 型號(hào)： | MC68B912B32 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V 100ppm/Degrees C, 50uA in SOT23-3 Series (Bandgap) Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 16位微控制器 |
| 文件頁(yè)數(shù)： | 3/128頁(yè) |
| 文件大?。?/td> | 748K |
| 代理商： | MC68B912B32 |
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Section
Page
MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
3
1
Introduction
Features ......................................................................................................................................1
Ordering Information ...................................................................................................................2
MC68HC912B32 Block Diagram .................................................................................................5
Central Processing Unit
Programming Model ....................................................................................................................6
Data Types ..................................................................................................................................7
Addressing Modes .......................................................................................................................7
Indexed Addressing Modes .........................................................................................................8
Opcodes and Operands ..............................................................................................................8
Pinout and Signal Descriptions
MC68HC912B32 Pin Assignments .............................................................................................9
Power Supply Pins ....................................................................................................................10
Signal Descriptions ....................................................................................................................11
Port Signals ...............................................................................................................................15
Port Pull-Up, Pull-Down and Reduced Drive .............................................................................19
Register Block
Operating Modes and Resource Mapping
Operating Modes .......................................................................................................................25
Background Debug Mode ..........................................................................................................26
Internal Resource Mapping .......................................................................................................28
Memory Maps ............................................................................................................................31
Bus Control and Input/Output
Detecting Access Type from External Signals ..........................................................................32
Registers ...................................................................................................................................32
Flash EEPROM
Overview ...................................................................................................................................37
Flash EEPROM Control Block ...................................................................................................37
Flash EEPROM Array ...............................................................................................................37
Flash EEPROM Registers .........................................................................................................37
Operation ...................................................................................................................................40
Programming the Flash EEPROM ............................................................................................42
Erasing the Flash EEPROM ......................................................................................................44
Program/Erase Protection Interlocks .........................................................................................46
Stop or Wait Mode .....................................................................................................................46
Test Mode .................................................................................................................................46
EEPROM
EEPROM Programmer’s Model ................................................................................................47
EEPROM Control Registers ......................................................................................................48
Resets and Interrupts
Exception Priority ......................................................................................................................52
Maskable Interrupts ...................................................................................................................52
Interrupt Control and Priority Registers .....................................................................................53
Resets .......................................................................................................................................54
Effects of Reset .........................................................................................................................54
Register Stacking ......................................................................................................................55
Clock Functions
Clock Sources ...........................................................................................................................57
Computer Operating Properly (COP) ........................................................................................57
Real-Time Interrupt ...................................................................................................................57
Clock Monitor ............................................................................................................................57
Clock Function Registers ..........................................................................................................58
Clock Divider Chains .................................................................................................................60
1
1.1
1.2
1.3
2
6
2.1
2.2
2.3
2.4
2.5
3
9
3.1
3.2
3.3
3.4
3.5
4
5
20
25
5.1
5.2
5.3
5.4
6
32
6.1
6.2
7
37
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
8
47
8.1
8.2
9
52
9.1
9.2
9.3
9.4
9.5
9.6
10
57
10.1
10.2
10.3
10.4
10.5
10.6
TABLE OF CONTENTS
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