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| 型號： | MC68B912B32 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V 100ppm/Degrees C, 50uA in SOT23-3 Series (Bandgap) Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 16位微控制器 |
| 文件頁數： | 53/128頁 |
| 文件大小： | 748K |
| 代理商： | MC68B912B32 |
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MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
53
9.3 Interrupt Control and Priority Registers
IRQE — IRQ Select Edge Sensitive Only
0 = IRQ configured for low-level recognition.
1 = IRQ configured to respond only to falling edges (on pin PE1/IRQ).
IRQE can be read anytime and written once in normal modes. In special modes, IRQE can be read any-
time and written anytime, except the first write is ignored.
IRQEN — External IRQ Enable
The IRQ pin has an internal pull-up.
0 = External IRQ pin disconnected from interrupt logic
1 = External IRQ pin connected to interrupt logic
IRQEN can be read and written anytime in all modes.
DLY — Enable Oscillator Start-Up Delay on Exit from STOP
The delay time of about 4096 cycles is based on the E clock rate.
0 = No stabilization delay imposed on exit from STOP mode. A stable external oscillator must be
supplied.
1 = Stabilization delay is imposed before processing resumes after STOP.
DLY can be read anytime and written once in normal modes. In special modes, DLY can be read and
written anytime.
$FFE8, $FFE9
$FFE6, $FFE7
$FFE4, $FFE5
$FFE2, $FFE3
$FFE0, $FFE1
$FFDE, $FFDF
$FFDC, $FFDD
$FFDA, $FFDB
$FFD8, $FFD9
Timer channel 3
Timer channel 4
Timer channel 5
Timer channel 6
Timer channel 7
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
TMSK1 (C3I)
TMSK1 (C4I)
TMSK1 (C5I)
TMSK1 (C6I)
TMSK1 (C7I)
TMSK2 (TOI)
PACTL (PAOVI)
PACTL (PAI)
SP0CR1 (SPIE)
SC0CR2
(TIE, TCIE, RIE, ILIE)
–
ATDCTL2 (ASCIE)
BCR1 (IE)
–
$E8
$E6
$E4
$E2
$E0
$DE
$DC
$DA
$D8
$FFD6, $FFD7
SCI 0
I bit
$D6
$FFD4, $FFD5
$FFD2, $FFD3
$FFD0, $FFD1
$FF80–$FFCF
Reserved
ATD
BDLC
Reserved
I bit
I bit
I bit
I bit
$D4
$D2
$D0
$80–$CE
INTCR
— Interrupt Control Register
$001E
Bit 7
6
5
4
3
2
1
Bit 0
IRQE
IRQEN
DLY
0
0
0
0
0
RESET:
0
1
1
0
0
0
0
0
Table 17 Interrupt Vector Map
Vector Address
Interrupt Source
CCR
Mask
Local Enable
Register (Bit)
HPRIO Value to
Elevate
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相關代理商/技術參數 |
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| MC68C812A4 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Supplement MC68C812A4 3.3V Electrical Characteristics |
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